uhd/fpga/usrp3/lib
2026-10-01 13:02:57 -05:00
..
axi fpga: lib: Make axis_width_conv FIFO size configurable 2026-08-20 17:31:01 +02:00
axi4_sv fpga: lib: Add clock domain comments to interfaces 2021-06-03 11:26:54 -05:00
axi4lite_sv fpga: lib: Minor cleanup of axi_lite.vh 2021-06-03 09:34:20 -05:00
axi4s_sv fpga: sim: Add to DESIGN_SRCS rather than replace 2026-06-29 08:08:59 +02:00
control fpga: lib: adjust ctrlport_to_wb_uart signal width 2026-10-01 13:02:57 -05:00
control_200 Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
dsp fpga: Upgrade to Vivado 2025.2: Repair all testbenches 2026-09-29 09:09:08 +02:00
extramfifo Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
fifo fpga: Upgrade to Vivado 2025.2: Repair all FPGA compiles 2026-09-29 09:09:08 +02:00
fifo_200 Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
gpif2 fpga: lib: Add DEVICE parameter to gpif2 and radio_legacy 2026-09-02 09:58:09 +02:00
hls fpga: lib: Fix addsub_hls 2022-08-25 13:55:30 -05:00
hwutils fpga: Add module for reading Xilinx device DNA 2024-05-27 17:05:06 +02:00
io_cap_gen fpga: refactor modules still using 2clk IP cores 2026-08-20 01:46:19 +02:00
io_port2 fpga: lib: add scalability to pcie host datapath components 2026-08-04 10:40:40 +02:00
ip fpga: lib: Upgrade to Vivado 2025.2 2026-09-29 09:09:08 +02:00
packet_proc fpga: lib: add scalability to pcie host datapath components 2026-08-04 10:40:40 +02:00
packet_proc_200 Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
radio_200 fpga: lib: Add DEVICE parameter to gpif2 and radio_legacy 2026-09-02 09:58:09 +02:00
rfnoc fpga: Upgrade to Vivado 2025.2: Repair all testbenches 2026-09-29 09:09:08 +02:00
sec fpga/rfnoc: Add license checker block 2024-05-27 17:05:06 +02:00
sim fpga: Update SPI simulation testbenches 2026-09-29 13:12:32 +02:00
simple_gemac Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
timing fpga: rfnoc: Remove deprecated files 2020-08-23 13:52:26 -05:00
vita_200 sim: Update chdr_16sc_to_sc12 testbench 2021-08-10 15:19:32 -05:00
vivado_ipi fpga: Add READMEs describing Lattice and ADI IP sourcing 2022-07-14 16:26:03 -05:00
wb_spi fpga: lib: extend wb_spi ability to limit transmission length 2020-06-04 14:46:19 -05:00
white_rabbit/wr_cores_v4_2 fpga: lib: Fix inferred latch in ep_autonegotiation 2022-11-18 14:53:41 -06:00
wishbone fpga: lib: Add ctrl_port_to_wb_i2c module 2023-05-25 07:08:07 -05:00
xge Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
xge_interface fpga: lib: Fix small packets stuck in 10 GbE TX 2020-10-05 16:03:21 -05:00
zpu Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00
zynq_fifo Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00