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Code Issues Projects Releases Wiki Activity
12,313 Commits 30 Branches 162 Tags 270 MiB
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Commit Graph

111 Commits

Author SHA1 Message Date
Max Köhler
dad6f906f9 fpga: remove X420 variants without DDC/DUC 2026-10-06 08:54:58 +02:00
Ahmed Salman
54f185ecdd ci: x420: add weekly hardware test coverage 2026-10-06 08:51:20 +02:00
Max Köhler
81c53bed91 fpga: ci: Replace modelsim with questasim 2026-09-29 09:09:08 +02:00
Max Köhler
ec32eb04ec ci: do not use publish permission for usrp4-hw 2026-09-18 16:07:14 +01:00
Max Köhler
a76ab6ffc9 Revert "ci: usrp4 sim: only run this stage if source is not master" 
This reverts commit 879ed08bb1.
 2026-09-18 16:07:14 +01:00
Max Köhler
be791eb065 ci: apply target name for X420 FPGA compiles 2026-08-28 16:06:17 +01:00
Marian Koop
8d9c53c83e ci: fpga: Added pipeline switch to optionally build alternate X420 designs 
Added pipeline switch to select between building X420_CG targets
with (default) or w/o DDC/DUC (alternate). In the pipeline the default
is to build the alternative design because of the low compile success
rates for these fpga designs when DDC/DUC is included.
 2026-08-23 02:02:27 +02:00
Niels Garibaldi
2f0fb8a1fa ci: add ddc/duc ats template tests for x410_x4_400 2026-08-20 17:08:19 +02:00
Frank Dietze
879ed08bb1 ci: usrp4 sim: only run this stage if source is not master 2026-08-20 16:07:33 +02:00
Max Köhler
5cb4e4f57f fpga: ci: use latest version of hwtools 2026-08-20 13:27:17 +02:00
Virendra Kakade
cbcf8a46c6 ci: add nib310rio-dev install step to UHD builds 
Add steps-install-nib310rio-dev.yml template that downloads
the deb or rpm artifact based on buildOSName and installs
nib310rio-dev before the build. This satisfies the nib310rio.h
build-time dependency required by UHD.

Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
 2026-08-20 01:51:42 +02:00
Lars Amsel
dd7607fc17 ci: add 800 MHz X440 images to pipeline builds 2026-08-10 17:21:47 +02:00
Marian Koop
2788ac9e6d ci: Integrate SBOM upload stage into mono pipeline stage list 2026-08-10 08:56:35 +02:00
Frank Dietze
4ef8c18981 ci: pipeline: separate embedded filesystem builds 2026-08-04 13:53:05 +02:00
Grant Meyerhoff
a18579e3e5 ci: Add support for USRP B310 
Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Javier Valenzuela <javier.j.valenzuela@emerson.com>
 2026-08-04 12:00:49 +02:00
Frank Dietze
e416bffa95 ci: streaming: generic agent selection by capabilities 2026-07-29 11:26:04 +02:00
Abhishek Verma
cfde75d5e8 ci: enable phase-coherency test 2026-07-24 10:13:27 +02:00
Jörg Hofrichter
d36b562bd3 ci: macos: build grpc before building UHD 2026-07-21 16:15:03 +02:00
Frank Dietze
4ea0d16db1 ci: phase-coherency test: disabled 2026-07-15 16:16:31 +02:00
Abhishek Verma
8704862ec6 ci: add gRPC build and CI integration 
Add gRPC and protobuf packages to all Linux Docker builder images
and Windows vcpkg manifests. Remove VS2019 builder support.
 2026-07-11 11:11:58 +02:00
Max Köhler
547acfb776 ci: add X420_XX_400 bitfiles to pipeline 2026-07-01 10:01:05 +02:00
Jörg Hofrichter
1c5da03e89 ci: update meta-ettus-dev branch to scarthgap 2026-06-25 14:47:14 +02:00
Aki Tomita
fbf48c25b7 ci: Merge Windows signing stage with the installers build 2026-05-28 17:29:59 +02:00
Ahmed Salman
34bf82ad2b ci: x420: add s175 stage for rf & dev tests 2026-05-05 13:34:21 +02:00
Frank Dietze
d375d68b74 ci: adapt rules for X420 tests 2026-03-24 14:17:05 +01:00
Max Köhler
680d354397 ci: Add support for USRP X420 (20 GHz USRP) 
Co-authored-by: Martin Anderseck <martin.anderseck@emerson.com>
 2026-03-20 16:15:06 +01:00
Max Köhler
78ed602590 ci: enable HBX CPLD build 2026-03-05 16:22:36 +01:00
Jörg Hofrichter
cfb9840727 ci: remove gnuradio-3-8 repository 
It is not being used anymore.
 2026-03-04 08:59:25 +01:00
Jörg Hofrichter
894859630a ci: update volk to 3.2.0 
Update the VOLK installation used for building GNU Radio to version
3.2.0 which is the latest release at the moment.
 2026-03-04 08:59:25 +01:00
Max Köhler
3061e66904 ci: fpga: add usrp4-hw tests as part of mono pipeline 2026-02-26 16:18:33 +01:00
Max Köhler
9a17c12931 ci: fpga: remove duplicated CPLD yml file 2026-02-19 17:58:46 +01:00
Max Köhler
9a65a5d6e8 fpga: ci: remove unused default values for x400 FPGA builds 2026-02-18 11:45:45 +01:00
Marian Koop
16dc34503c ci: installer: Pass release flag to new installer step templates 
Additionally add azdo variable group required by step templates.
 2026-02-13 16:54:52 +01:00
Marian Koop
d5bc1942ce ci: Integrate SBOM generation for installer packages 
- Created a step templates in the private repo ettus-rts
  to encapsulate steps for SBOM generation for installer packages,
  enabling internal dependency and vulnerability tracking.
 2026-01-16 21:20:18 +01:00
Jörg Hofrichter
62d24c1575 ci: pass parameters additional_setup_steps and rfnoc_include_dir 2026-01-13 12:38:50 +01:00
Jörg Hofrichter
d71cd0430c ci: fix FPGA download for uhdlvtest 2025-12-08 17:46:58 +01:00
Frank Dietze
184672ec18 ci: devtest: add x310-4 to s175-devtests 2025-11-27 15:01:34 +01:00
Frank Dietze
682516edf4 ci: lvtest: add filesystem and fpga update 2025-11-26 13:39:09 +01:00
Niels Garibaldi
fdc2872786 ci: increase fpga build timeout for X440 variants 
Fixes an issue that was recently introduced with commit 2a77ec9,
which fixed the per attempt timeout of FPGA builds. Some of the
x440 FPGA builds can take longer than the default 6h timeout to
successfully compile. After the per attempt timeout bug was fixed
some of our most crowded FPGA targets were prematurely terminated,
significantly reducing compile success rate. This commit increases
the per attempt timeout from 6h to 9h.
 2025-11-18 08:52:54 +01:00
Martin Anderseck
340b8b6c1f ci: Enable passing CMake arguments 
This adds the option to pass CMake arguments to the pipeline, so that
for instance installers with more detailed logging can be built.
 2025-11-14 17:50:51 +01:00
Max Köhler
34ece31af4 ci: fpga: add xsim simulation job 2025-11-04 16:48:29 -06:00
Wade Fife
2a77ec9a86 ci: fpga: Add timeout per build attempt 2025-10-20 08:25:30 +02:00
Jörg Hofrichter
3e9f34cb49 ci: support building with custom boost version on macos 2025-10-07 14:26:40 +02:00
Marian Koop
f3ce3e9948 ci: Add ci job to validate readthedocs user manual build flow 
Job exercises the readthedocs build flow and attempts to perform
some error checking and log file evaluation.
ReadTheDocs currently uses Ubuntu 22 based build workers, the job
runs on Ubuntu 22 and 24. On Ubuntu 22 warnings found in the
sphinx log file are treated as fatal error.
 2025-10-06 08:36:18 +02:00
Grant Meyerhoff
c52889b356 usrp: Add support for OBX daughterboard 
This adds support for the OBX daughterboard, a new daughterboard
compatible with the USRP X3x0 series.

- Includes both UHD and CPLD codebases
- Includes CI hooks

Co-authored-by: Javier Valenzuela <javier.valenzuela@emerson.com>
 2025-07-28 09:33:14 +02:00
Max Köhler
435b13d90d fpga: ci: add register map check 2025-07-15 11:29:55 +02:00
Clemens Felber
35d3548416 ci: dev: added pipeline stage for LabVIEW based USRP tests 
Introduced inital pipeline stage for testing LabVIEW USRP examples
located within github repo ni/labview-usrp-examples.
 2025-07-12 07:07:21 +02:00
Max Köhler
11b56b9650 fpga: ci: add CPLD compile job 2025-07-01 13:15:44 +02:00
Frank Dietze
4fdfa315b3 ci: changeset: update label rules 2025-06-03 12:54:29 +02:00
Frank Dietze
364a265f39 ci: take testOS from agent environment 2025-05-28 15:53:52 +02:00