ci: add ddc/duc ats template tests for x410_x4_400

This commit is contained in:
Niels Garibaldi 2026-07-21 14:35:59 +02:00 committed by mkoop-ni
parent 879ed08bb1
commit 2f0fb8a1fa
6 changed files with 49 additions and 1 deletions

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@ -932,6 +932,7 @@ stages:
fpga_imgs_source: 'Pipeline'
${{ else }}:
fpga_imgs_source: 'Filesystem'
runX410X4400RfSubset: true
testLength: ${{ parameters.testLength }}
- template: tests/job-uhd-x440-hardware-tests-pebbles.yml
parameters:

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@ -13,6 +13,9 @@ parameters:
- name: extra_rf_test_args
type: string
default: ''
- name: runX410X4400RfSubset
type: boolean
default: false
- name: testLength
type: string
@ -25,6 +28,7 @@ jobs:
runPyTestNonRF: false
runDevTest: false
runSystemImageTest: false
runX410X4400RfSubset: ${{ and(parameters.runX410X4400RfSubset, eq(parameters.fpga_imgs_source, 'Pipeline')) }}
uhdArtifactSource: ${{ parameters.uhdArtifactSource }}
uhdFpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }}
fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
@ -40,5 +44,6 @@ jobs:
uartSerial: $(x410_uartSerial)
pipelineAgent: pebbles-agent-1
pytestAtsConfig: uhd_oss_ats
pytestConfigDut: 'x410-400'
pytestDUT: 'x410'
sfp0ip: '192.168.30.62'

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@ -18,6 +18,9 @@ parameters:
- name: runRfnocBlockTest
type: boolean
default: false
- name: runX410X4400RfSubset
type: boolean
default: false
- name: forceIQCorrections
type: boolean
default: false
@ -422,6 +425,37 @@ jobs:
resultFileNameBase: 'complex_gain_block_test'
testSelector: 'test_radio_control_complex_gain.py'
- ${{ if parameters.runX410X4400RfSubset }}:
- template: ../../steps-download-fpga-artifact.yml
parameters:
dutType: $(pytestDUT)
dutFPGA: 'X4_400'
fpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }}
fpga_imgs_source: ${{ parameters.fpga_imgs_source }}
- script: |
UHD_INSTALL_PATH=$(uhd_artifact_directory)/uhddev-$(testOS)-${{ parameters.toolset }}/uhddev/build-installed
export PATH=$UHD_INSTALL_PATH/bin:$PATH
if [ -d "$UHD_INSTALL_PATH/lib64" ]; then
export LD_LIBRARY_PATH=$UHD_INSTALL_PATH/lib64:$LD_LIBRARY_PATH
else
export LD_LIBRARY_PATH=$UHD_INSTALL_PATH/lib:$LD_LIBRARY_PATH
fi
uhd_image_loader --args type=$(dutType),addr=$(USRP_EMB_TARGET_IP) \
--fpga=$FPGA_ARTIFACT_DIR/$FPGA_BITFILE_NAME.bit
displayName: 'X410/X4_400 RF subset: Load FPGA on USRP'
- template: step-uhd-run-pytest-on-host.yml
parameters:
runPyTest: true
displayString: 'X410/X4_400 RF subset'
testFolder: 'pytests'
pytestConfigDut: $(pytestConfigDut)
testSelector: 'test_ddc_response.py test_rx_offset_tone_sweep.py test_tx_offset_tone_sweep.py'
testLength: ${{ parameters.testLength }}
warmUpAfterBoot: ${{ parameters.warmUpAfterBoot }}
toolset: ${{ parameters.toolset }}
# Run the mender tests last because they
# modify the flashed image on the device
- script: |

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@ -10,6 +10,12 @@ parameters:
- name: extra_rf_test_args
type: string
default: ''
- name: pytestConfigDut
type: string
default: '$(pytestDUT)'
- name: testSelector
type: string
default: '.'
- name: testLength
type: string
default: 'smoke'
@ -69,7 +75,7 @@ steps:
source $(Build.SourcesDirectory)/ettus-rts/config/remote/python_tests/setup_venv.sh
cd $(Build.SourcesDirectory)/ettus-rts/config/remote/python_tests/${{ parameters.testFolder }}
python3 ../automated_main.py --test_selector . --ats_config $(pytestAtsConfig) --dut $(pytestDUT) --run_vars_overrides 'mgmt_addr=$(USRP_EMB_TARGET_IP)' --results_path '$(Common.TestResultsDirectory)/pytest/host' --test_length ${{ parameters.testLength }} ${{ parameters.extra_rf_test_args }}
python3 ../automated_main.py --test_selector ${{ parameters.testSelector }} --ats_config $(pytestAtsConfig) --dut ${{ parameters.pytestConfigDut }} --run_vars_overrides 'mgmt_addr=$(USRP_EMB_TARGET_IP)' --results_path '$(Common.TestResultsDirectory)/pytest/host' --test_length ${{ parameters.testLength }} ${{ parameters.extra_rf_test_args }}
displayName: Run ${{ parameters.displayString }} on host
continueOnError: true
condition: and(succeeded(), ${{ parameters.runPyTest }})

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@ -325,6 +325,7 @@ stages:
uhdArtifactSource: uhd_mono_pipeline
uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }}
fpga_imgs_source: ${{ variables.fpga_imgs_source }}
runX410X4400RfSubset: true
extra_rf_test_args: ${{ parameters.extra_rf_test_args }}
testLength: ${{ parameters.testLength }}

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@ -126,6 +126,7 @@ stages:
uhdArtifactSource: uhd_mono_pipeline
uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }}
fpga_imgs_source: ${{ variables.fpga_imgs_source }}
runX410X4400RfSubset: true
testLength: ${{ parameters.testLength }}
- template: templates/tests/job-uhd-x440-hardware-tests-pebbles.yml
parameters: