Wade Fife d110c060f2 fpga: Fix check_timing.py break indent ... This fixes an issue introduced by commit 699cff5941, where the break statement was incorrectly indented outside the for loop.		2026-09-02 09:40:20 +02:00
..
export/x300/radio	fpga: removing deprecated FIFO IP cores	2026-08-20 01:46:19 +02:00
lib	fpga: dsp: fix race condition in axi_tag_time_ms	2026-08-28 14:59:35 +01:00
sim	fpga: dsp: add wideband ddc and duc rfnoc blocks	2026-08-05 08:43:42 +02:00
tools	ci: Update fpga packaging configs	2026-08-27 08:41:16 +01:00
top	fpga: Fix check_timing.py break indent	2026-09-02 09:40:20 +02:00
.gitignore	Move ignore of build folders into top level	2025-07-18 11:19:52 +02:00
build.py	fpga: Replace references to python -> python3	2023-12-05 15:43:08 -06:00
LICENSE.md	Merge FPGA repository back into UHD repository	2020-01-28 09:35:36 -08:00