uhd/fpga/usrp3
Jörg Hofrichter 3cfb163340 fpga: e320/n3xx: dts: Fixed PHY mode for 1G connections
Without this change, kernel 6.12 generates the following warning:

nixge 40000000.ethernet (unnamed net_device) (uninitialized): fixed link full duplex 1000Mbps not recognised

With the change, the link is correctly detected as 1G:

nixge 40000000.ethernet sfp0: configuring for fixed/gmii link mode
2026-08-28 15:02:53 +01:00
..
export/x300/radio fpga: removing deprecated FIFO IP cores 2026-08-20 01:46:19 +02:00
lib fpga: dsp: fix race condition in axi_tag_time_ms 2026-08-28 14:59:35 +01:00
sim fpga: dsp: add wideband ddc and duc rfnoc blocks 2026-08-05 08:43:42 +02:00
tools ci: Update fpga packaging configs 2026-08-27 08:41:16 +01:00
top fpga: e320/n3xx: dts: Fixed PHY mode for 1G connections 2026-08-28 15:02:53 +01:00
.gitignore Move ignore of build folders into top level 2025-07-18 11:19:52 +02:00
build.py fpga: Replace references to python -> python3 2023-12-05 15:43:08 -06:00
LICENSE.md Merge FPGA repository back into UHD repository 2020-01-28 09:35:36 -08:00