Commit Graph

9136 Commits

Author SHA1 Message Date
michael-west
b38c9d8372 B200: Fix overflow handling
- Use FPGA images with fixed sc12 converter.
- Properly flush channels and restart streaming in the case of an overrun.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-10-08 09:17:56 -05:00
michael-west
c7849360a0 images: Update manifest
Update to use FPGA images with recent fixes.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-10-08 09:17:56 -05:00
Martin Braun
700b75b94d docs: sync: Update page on synchronization
- Clarify features that only work on B100 and N2x0 (_external_)
- De-emphasize MIMO-cable sync
2021-10-08 09:17:56 -05:00
Martin Braun
d720a31fee cmake: Fix issues with static builds and CMRC
Adds uhd_rc as a link target to static builds of libuhd. This fixes
build errors like this:

```
uhd/lib/cal/database.cpp:12:10: fatal error: cmrc/cmrc.hpp: No such file
or directory
 #include <cmrc/cmrc.hpp>
```

This also adds uhd_rc as to $libuhd_libs instead of just listing it
separately, and target objects from uhd_rc to $libuhd_sources.
2021-10-08 09:17:56 -05:00
Martin Anderseck
55fdc1f784 X300: Fix error message for wrong reference frequency
Error message was not adapted when support for 11.52 MHz and 23.04 MHz
references was added. Fixing this.
2021-10-08 09:17:56 -05:00
Martin Braun
8452891810 x300: Remove unused variables in x300_eth_mgr.cpp 2021-10-08 09:17:56 -05:00
Wade Fife
a1540d7ae2 fpga: x300: Update synchronizer constraint 2021-09-29 12:42:38 -05:00
Wade Fife
0fa7cddc08 fpga: n3xx: Update synchronizer constraint 2021-09-29 12:42:38 -05:00
Wade Fife
505d9b5ec7 fpga: lib: Update example constraint in synchronizer 2021-09-29 12:42:38 -05:00
Martin Braun
7e765bbb1f cmake: Replace CMAKE_{SOURCE,BINARY}_DIR with UHD_*_DIR
See the CMake 3.8 documentation on these two variables:
https://cmake.org/cmake/help/v3.8/variable/PROJECT-NAME_SOURCE_DIR.html
https://cmake.org/cmake/help/v3.8/variable/CMAKE_SOURCE_DIR.html

Under normal circumstances, these two are identical. For sub-projects
(i.e., when building UHD as part of something else that is also a CMake
project), only the former is useful. There is no discernible downside of
using UHD_SOURCE_DIR over CMAKE_SOURCE_DIR.

This was changed using sed:

$ sed -i "s/CMAKE_SOURCE_DIR/UHD_SOURCE_DIR/g" \
    `ag -l CMAKE_SOURCE_DIR **/{CMakeLists.txt,*.cmake}`
$ sed -i "s/CMAKE_BINARY_DIR/UHD_BINARY_DIR/g" \
    `ag -l CMAKE_BINARY_DIR **/{CMakeLists.txt,*.cmake}`

At the same time, we also replace the CMake variable UHD_HOST_ROOT (used
in MPM) with UHD_SOURCE_DIR. There's no reason to have two variables
with the same meaning and different names, but more importantly, this
means that UHD_SOURCE_DIR is defined even in those cases where MPM calls
into CMake files from UHD without any additional patches.

Shoutout to GitHub user marcobergamin for bringing this up.
2021-09-29 12:42:38 -05:00
Lane Kolbly
2937ca30c4 Create C++ wrappers for MPM RPC calls
This gives us type-safety, as well as allowing us to create unit tests for
RFNoC radio_controls without having to create actual RPC servers and clients
in the unit tests.
2021-09-29 12:42:38 -05:00
Aaron Rossetto
ccc627fb8a mpm: Fix set_sync_source() call 2021-09-29 12:42:38 -05:00
Lane Kolbly
aaac1f47e8 uhd: mpm: Expose filesystem version information on MPM tree
This allows UHD clients to determine, for example, whether the currently
loaded filesystem is up-to-date.
2021-09-29 12:42:38 -05:00
Martin Braun
8dfc671885 mpmd: Export RPC token and mb_args to the property tree
There are applications (typically for debugging purposes) which need
access to the token and the mb_args. They are thus published via the
property tree.
2021-09-29 12:42:38 -05:00
Martin Braun
ba534af868 rh: Fix auto DC-offset correction and auto-IQ balance APIs
N320 doesn't have an automatic RX IQ balance correction, so that API is
removed.
The auto-DC offset correction was calling into the manual DC offset
correction code, which means auto-DC offset correction was never enabled
for N320.
2021-09-29 12:42:38 -05:00
Martin Braun
0f450cc774 cmake: tests: Add build-python path to PYTHONPATH
This is more of an expressive change than a functional change; Python
seems to add this path to the PYTHONPATH anyway, at least for some
systems. We neverless make this change because:
- It's more explicit/expressive. When tests are run, the PYTHONPATH env
  variable is printed, and it now contains this path where it should be,
  right at the front. People reading the ctest/python.unittest output
  now get told explicitly which path we mean.
- This guarantees that this path is added, even if Python/unittest
  should behave differently on other systems or versions.

To clarify: When running unit tests, we want to run the Python code from
build/python, not the installed version. The latter may not yet exist,
and if it does, it's not the version we are editing.
2021-09-29 12:42:38 -05:00
Wade Fife
f35726f505 examples: Show how to use in-tree Verilog header
Adds example showing how to `include an in-tree Verilog header
file in the rfnoc_block_gain example.
2021-09-29 12:42:38 -05:00
Wade Fife
dcd7553915 fpga: Remove stale references to UHD_FPGA_DIR 2021-09-29 12:42:38 -05:00
Wade Fife
a2060d87b6 fpga: tools: Add UHD_FPGA_DIR definition to synthesis
This adds a Verilog definition named `UHD_FPGA_DIR that corresponds to
the location of the UHD "fpga" directory. This allows you to include
files in your out-of-tree modules relative to the FPGA directory. For
example, you could include the library header file rfnoc_chdr_utils.vh
using the following:

`include `"`UHD_FPGA_DIR/usrp3/lib/rfnoc/core/rfnoc_chdr_utils.vh`"

Some simulators may not support `" outside of the context of a `define,
in which case you can do the following:

`define RFNOC_CHDR_UTILS_PATH \
  `"`UHD_FPGA_DIR/usrp3/lib/rfnoc/core/rfnoc_chdr_utils.vh`"
`include `RFNOC_CHDR_UTILS_PATH
2021-09-29 12:42:38 -05:00
Martin Braun
af9c25f5ab x300: Fix MAX_RATE_1GIGE value
It held the same value as MAX_RATE_10GIGE due to a typo.
2021-09-29 12:42:38 -05:00
Martin Braun
b06c01e436 tests: Fix check in link_test
The test_recv_get_release test should be checking received packets had
the same content as they did on send(), but was instead assigning to the
received buffer.

Shoutouts to GitHub user johnwstanford for pointing out the issue.
2021-09-29 12:42:38 -05:00
Aaron Rossetto
ba18be72f6 uhd: transport: Avoid exceptions in disconnect_receiver()
inline_io_service::disconnect_receiver() uses the recv_link_if parameter
as a key into the _recv_tbl map. In some error cases, notably when an
underlying link timeout occurs when setting up a transport, that key may
not exist in the table. Attempting to index the table by that
non-existent key causes an std::out_of_range exception to be thrown.
However, in the aforementioned error case, disconnect_receiver() is
called as part of a destructor of an object that is in one of the stack
frames being unwound as the timeout exception is in flight. Throwing an
exception while one is in flight ultimately causes the C++ runtime to
terminate the process. (Generally, throwing an exception in a
destructor, unless caught within the destructor, is considered a bad
practice for this very reason.)

This PR modifies disconnect_receiver() to check for the existence of the
entry in the map and bypass the access if it is not present, thus
preventing the exception from being thrown in this function which is
invoked from another object's destructor.
2021-09-29 12:42:38 -05:00
Martin Braun
814dc91a3f rfnoc: ddc: Improve unit tests and documentation
The previous commit fixed a bug in the DUC, where get_frequency_range()
reported incorrect values. The DDC did not have this bug, but we port
the updates to the unit tests and the documentation from the DUC to the
DDC for consistency's sake.
2021-09-29 12:42:38 -05:00
Martin Braun
9b3d78b708 rfnoc: duc: Fix frequency range for DUC block
The tuning range of the DUC depends on the output sample rate (which is
larger), but it was using the input sample rate. This was causing a bug
where for Tx, the DSP tuning range was limited when using multi_usrp API,
and thus would not allow to DSP-tune beyond the current sampling rate.

In this patch, we also re-use the existing calculation of the sampling
rate, and harmonize that code between duc_block_control and
ddc_block_control.

Consider the following Python REPL code:

>>> import uhd
>>> U = uhd.usrp.MultiUSRP('type=x300')
>>> U.set_rx_rate(10e6)
>>> U.set_tx_rate(10e6)
>>> # Creating a streaming is required, or the input rate will not be
>>> # set:
>>> S = U.get_tx_stream(uhd.usrp.StreamArgs("fc32", "sc16"))
>>> treq = uhd.types.TuneRequest(1e9)
>>> treq.rf_freq = 1e9
>>> treq.dsp_freq = 50e6
>>> treq.dsp_freq_policy = uhd.types.TuneRequestPolicy.manual
>>> treq.rf_freq_policy = uhd.types.TuneRequestPolicy.manual
>>> tres = U.set_rx_freq(treq, 0)
>>> print(str(tres))
Tune Result:
Target RF  Freq: 1000.000000 (MHz)
Actual RF  Freq: 1000.000000 (MHz)
Target DSP Freq: 50.000000 (MHz)
Actual DSP Freq: 5.000000 (MHz)
>>> # Note the last two lines: The *target* DSP freq was already clipped
>>> # to 5 MHz. These lines show 50.0 MHz when this patch is applied.

This bugfix is accompanied some related changes:
- The unit test is amended to verify the behaviour
- The API documentation is amended with details on its behaviour
2021-09-29 12:42:38 -05:00
Aaron Rossetto
1036959a89 python: Add new method bindings to noc_block_base
This commit adds `get_src_epid()` and `get_port_num()` method bindings
to the Python bindings for `noc_block_base`.
2021-09-29 12:42:38 -05:00
Wade Fife
da336a5a91 fpga: Set default part for sim in setupenv.sh
This sets the ARCH and PART_ID environment variables so that the
selected part family is used for simulations by default. This can be
overridden by changing them in the Makefile for the testbench if a
testbench requires a specific part family. Prior to this change, the
default was always ARCH=kintex7, PART_ID=xc7k410t/ffg900/-2, which
required support for that part to be installed.
2021-09-29 12:42:38 -05:00
Martin Braun
9af379363d cmake: Add check for libatomic linking requirement
Some archs require linking against libatomic, others don't. We add some
CMake code that checks for libatomic.so requirement if:
- We are not on MSVC, AND
- Compiling std::atomics code would cause a linker error.

We then check for the existence of libatomic.so, and fail if we can't
find it.
2021-09-29 12:42:38 -05:00
Wade Fife
b424e5f183 x300: Fix sfpp_io_core tuser width 2021-09-29 12:42:38 -05:00
Martin Braun
6dd2c17b68 uhd: Remove Boost version checks for Boost 1.61
UHD requires Boost 1.65, so checks for Boost 1.61 will always be
satisfied.
2021-09-29 12:42:38 -05:00
Martin Braun
4261f76219 fpga: Fix Xilinx bitfile parser for Python 3
The script was previously only Python 2 compatible.

Python 2 support is now removed, so we don't maintain backwards
compatibility with Python 2.

This also fixes all linter warnings.
2021-09-29 12:42:38 -05:00
Michael Dickens
cd66cbb74e cmake: remove duplicate entry in LIBUHD_PYTHON_GEN_SOURCE
Closes: https://github.com/EttusResearch/uhd/issues/478
2021-09-29 12:42:38 -05:00
Aaron Rossetto
d01751efe1 tests: Add recv(0) case to rx_streamer_test 2021-09-29 12:42:38 -05:00
Aaron Rossetto
409e896807 uhd: streamer: Restore original recv(0) semantics
A recv() of zero samples on an RX stream should return immediately
(i.e., without respect to the timeout and regardless of the availability
of samples), surfacing any stream error conditions via metadata. This
convention was broken in a2f10ee9, causing a recv() of zero samples to
wait for the entire timeout period and then return ERROR_CODE_TIMEOUT if
no samples are available. This commit restores the desired semantics.
2021-09-27 12:41:51 -05:00
Martin Anderseck
e4932ae6cd X300: Initialize struct variable before using it
In x300_eth_mgr.cpp the variable init is created but not initialized.
Only some of the variables within the struct are then set before init
is assigned to a different variable. Initialize the variable to
prevent unexpected values.
2021-09-27 12:41:51 -05:00
Martin Anderseck
2cba65bed1 lib: transport: Mark typecast as intended
Remove warning about potential data loss in VS due to typecast by
marking it as intended.
2021-08-19 16:02:55 -05:00
Martin Anderseck
2bb22f9ac2 lib: transport: Initialize _hshake_args_server
Initialize _hshake_args_server to safely use this struct and its
contents in line 70.
2021-08-19 16:02:49 -05:00
michael-west
51cfe9d4ef n3xx: Add support for rev 10
No hardware interface change, so just bumping max revision.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-19 16:02:41 -05:00
michael-west
ab3a016f73 N320: Reduce PLL lock time
- Reduce PLL1 DLD lock count to 4,000 (0xFA0), or 100ms
- Change loop to check for lock every 10ms

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-19 16:02:33 -05:00
michael-west
e6cd5674e1 sim: Update chdr_16sc_to_sc12 testbench
Modified to send 2 packets back to back at each packet size to test
output during sequential input packets.  Also fixed whitespace.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-19 16:02:24 -05:00
michael-west
4fb5e2eb3f fpga: Re-order error and data packets
Added delay to error packets so overrun error is back in-band.  Avoids
dropping good data packets in the case of an overrun.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-19 16:02:18 -05:00
michael-west
b9e927b760 fpga: Fix sc16 to sc12 converter
Re-wrote converter to remove clock cycle delay on i_tready when handling
residual output and fixed improper handling of tlast during residual
data processing.  Resolves some USB overflow issues when using sc12 data
type on B200 devices.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-19 16:02:09 -05:00
Martin Anderseck
aa41cdb42e lib: rfnoc: Make implicit typecasts explicit
Fix implicit typecasts that could potentially lose data. Doing this to
show that these typecasts are done on purpose (and to resolve warnings
from VS).
2021-08-19 16:01:57 -05:00
Martin Anderseck
01e4ecfd71 lib: rfnoc: Change enum node_type to enum class
Fix the "Enum.3: Prefer class enums over "plain" enums" warning for the
node_type enum and update the calls to the enumerators as proposed by
the C++ Core Guidelines.
2021-08-19 16:01:51 -05:00
Wade Fife
bdcde92afa fpga: rfnoc: Fix EOB loss in DUC
There were some rare corner cases where the EOB could get lost in the
DUC due to the dds_timed logic not always passing it through as it
should. This resulted in an underflow error message at the end of
transmission.

This commit also fixes an issue where part of the last packet
used a frequency shift of 0 instead of the requested frequency
shift, and an issue where the first few samples of a burst used the
wrong frequency shift value.

Part of the fix includes adding a TUSER port to dds_sin_cos_lut_only.
The TUSER port is built into the IP but was disabled. It is now
enabled and set to 1 bit wide. This has a very small effect on
resource usage and can be left unconnected when not needed.

The dds_freq_tune block was shared by the DUC and DDC. To avoid
affecting the DDC, a new version, dds_freq_tune_duc, is being
added for the DUC to use that has the necessary fixes.

The new dds_wrapper.v is a wrapper for the dds_sin_cos_lut_only IP.
This IP has the undesirable behavior that new inputs must be provided
to push previous outputs through the IP. This wrapper hides that
complexity by adding some logic to ensure all data gets pushed through
automatically. This logic uses the TUSER port on the IP.

Finally, a testbench for dds_timed was added.
2021-08-19 16:01:40 -05:00
Wade Fife
7922b64a3c fpga: sim: Add PkgComplex, PkgMath, and PkgRandom
PkgComplex adds functions for doing complex arithmetic in SystemVerilog
simulation.

PkgMath provides mathematical operations and constants that aren't
built into SystemVerilog, such as a constant for pi and the function
round().

PkgRandom adds randomization functions beyond what standard Verilog
supports but that don't require any special licenses or simulators.
2021-08-19 16:01:25 -05:00
Wade Fife
754944aa89 fpga: lib: Clean up and document lib files
Clean-up and document axi_tag_time, dds_freq_tune, and axi_sync.
2021-08-19 16:01:17 -05:00
Wade Fife
e72c7f3c65 rfnoc: duc: Remove stale references to CORDIC
Updated some comments that still referenced the old CORDIC
implementation, which is no longer used.
2021-08-19 16:01:10 -05:00
Steven Koo
0d184ff412 cmake: Fix VS names and use relative for images
cmake has newer variables to identify specific Visual Studio version.
This change updates to use those. This also changes how images
files are globbed to be relative paths, which is useful if build files
are moved from machine to machine. This case is possible in Azure
Pipeline's CI.

Signed-off-by: Steven Koo <steven.koo@ni.com>
2021-08-09 12:23:26 -05:00
michael-west
362aeb749c N3xx: Fix White Rabbit
Reconnect the signals from the White Rabbit module to the TDC in the
FPGA.

Signed-off-by: michael-west <michael.west@ettus.com>
2021-08-09 11:42:37 -05:00
Martin Anderseck
ed9d15e7a5 test: Fix potential resource leak
Fixed issue where variable tmp_file going out of scope could have
leaked the storage it points to. Replaced the declaration of tmp_file
by using a unique pointer with custom deleter that takes care of
closing the tmpfile when it is not needed anymore.
2021-08-09 11:42:24 -05:00