fpga: dsp: Add FIFO_SIZE parameter to CIC comb filter

Adding a FIFO size module parameter to the comb filter module, in
order to selectively set only the last of N-order filter stages to
use a 2-stage FIFO.
This commit is contained in:
Niels Garibaldi 2026-09-02 11:56:50 +02:00 committed by mkoop-ni
parent 285cce69a2
commit 57df0ca685
3 changed files with 14 additions and 7 deletions

View File

@ -56,13 +56,17 @@
// SPC : Number of samples processed per clock cycle. Must be a
// power of 2 and at least 1.
//
// FIFO_SIZE : Log2 of the depth of the output buffer FIFO. Set to 0 for
// a single-stage flop.
//
`default_nettype none
module cic_comb_filter #(
parameter int ACCUM_W = 96,
parameter int SPC = 4
parameter int SPC = 4,
parameter int FIFO_SIZE = 0
) (
input wire clk,
input wire rst,
@ -178,14 +182,15 @@ module cic_comb_filter #(
//---------------------------------------------------------------------------
// Output FIFO (single stage)
//
// Breaks the combinational path from data_out.tready to data_in.tready.
// Optionally breaks the combinational path from data_out.tready to
// data_in.tready.
//---------------------------------------------------------------------------
logic [SPC*ACCUM_W:0] fifo_out_tdata;
axi_fifo #(
.WIDTH(SPC * ACCUM_W + 1),
.SIZE (1)
.SIZE (FIFO_SIZE)
) output_buffer (
.clk (clk),
.reset (rst),

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@ -202,8 +202,9 @@ module cic_filter_decim #(
//---------------------------------------------------------------------------
for (genvar stage = 0; stage < ORDER; stage++) begin : gen_combs
cic_comb_filter #(
.ACCUM_W (ACCUM_W),
.SPC (SPC)
.ACCUM_W (ACCUM_W),
.SPC (SPC),
.FIFO_SIZE((stage == ORDER-1)? 1 : 0)
) cic_comb_filter_i (
.clk (clk),
.rst (rst),

View File

@ -175,8 +175,9 @@ module cic_filter_interp #(
//---------------------------------------------------------------------------
for (genvar stage = 0; stage < ORDER; stage++) begin : gen_combs
cic_comb_filter #(
.ACCUM_W (ACCUM_W),
.SPC (SPC)
.ACCUM_W (ACCUM_W),
.SPC (SPC),
.FIFO_SIZE((stage == ORDER-1)? 1 : 0)
) cic_comb_filter_i (
.clk (clk),
.rst (rst),