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e466f427fd
Updated the host related files to support wideband DxC block variants. The singlesample and multisample variants both have the same API, but internally they are using different register address spaces to interact with the FPGA implementation. The host implementation checks which implementation a RFNoC DxC block is using by checking the block version number and will then automatically choose the correct register address scheme. This is all transparent to the user, the Block API stays the same. Co-authored-by: Niels Garibaldi <niels.steffen.garibaldi@emerson.com> Co-authored-by: André Zoch <andre.zoch@emerson.com> Co-authored-by: Meghana Halladamath <meghana.halladamath@emerson.com> Co-authored-by: Wade Fife <wade.fife@ettus.com> Co-authored-by: Max Köhler <max.koehler@emerson.com>
232 lines
11 KiB
C++
232 lines
11 KiB
C++
//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: GPL-3.0-or-later
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//
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#include <uhd/rfnoc/actions.hpp>
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#include <uhd/rfnoc/defaults.hpp>
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#include <uhd/rfnoc/detail/graph.hpp>
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#include <uhd/rfnoc/duc_block_control.hpp>
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#include <uhd/rfnoc/mock_block.hpp>
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#include <uhd/rfnoc/mock_nodes.hpp>
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#include <uhd/rfnoc/node_accessor.hpp>
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#include <uhdlib/utils/narrow.hpp>
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#include <boost/test/unit_test.hpp>
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#include <cmath>
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#include <iostream>
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using namespace uhd::rfnoc;
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using namespace uhd::rfnoc::test;
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namespace {
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constexpr size_t DEFAULT_MTU = 8000;
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} // namespace
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void test_duc_block(const duc_block_control::reg_addrs_t& ver)
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{
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node_accessor_t node_accessor{};
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constexpr uint32_t num_hb = 2;
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constexpr uint32_t max_cic = 128;
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constexpr size_t num_chans = 4;
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constexpr noc_id_t noc_id = DUC_BLOCK;
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constexpr int TEST_INTERP = 20; // 2 halfbands, CIC==5
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constexpr double DEFAULT_RATE = 200e6; // Matches typical MCR of X310
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if (ver.major_compat == 0) {
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BOOST_REQUIRE(ver.n_addr);
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BOOST_REQUIRE(ver.m_addr);
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} else {
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BOOST_CHECK(!ver.n_addr);
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BOOST_CHECK(!ver.m_addr);
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}
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auto block_container = get_mock_block(noc_id, num_chans, num_chans);
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auto& duc_reg_iface = block_container.reg_iface;
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duc_reg_iface->read_memory[duc_block_control::REG_COMPAT_NUM] =
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(ver.major_compat << 16) | ver.minor_compat;
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duc_reg_iface->read_memory[ver.num_hb] = num_hb;
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duc_reg_iface->read_memory[ver.cic_max_interp] = max_cic;
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auto test_duc = block_container.get_block<duc_block_control>();
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BOOST_REQUIRE(test_duc);
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node_accessor.init_props(test_duc.get());
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UHD_LOG_DEBUG("TEST", "Init done.");
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test_duc->set_property<int>("interp", TEST_INTERP, 0);
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BOOST_REQUIRE(duc_reg_iface->write_memory.count(ver.interp_addr));
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BOOST_CHECK_EQUAL(duc_reg_iface->write_memory.at(ver.interp_addr), 2 << 8 | 5);
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BOOST_REQUIRE(duc_reg_iface->write_memory.count(ver.scale_iq_addr));
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// CIC gain is 5^(4-1)=125, normalized by 128 in the FPGA.
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constexpr uint32_t EXPECTED_SCALE_IQ = 33554;
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BOOST_CHECK_EQUAL(
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duc_reg_iface->write_memory.at(ver.scale_iq_addr), EXPECTED_SCALE_IQ);
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BOOST_CHECK_EQUAL(test_duc->get_mtu({res_source_info::INPUT_EDGE, 0}), DEFAULT_MTU);
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// Now plop it in a graph
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detail::graph_t graph{};
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detail::graph_t::graph_edge_t edge_info;
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edge_info.src_port = 0;
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edge_info.dst_port = 0;
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edge_info.is_forward_edge = true;
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edge_info.edge = detail::graph_t::graph_edge_t::DYNAMIC;
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mock_terminator_t mock_source_term(
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1, {ACTION_KEY_STREAM_CMD, ACTION_KEY_TUNE_REQUEST});
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mock_terminator_t mock_sink_term(1, {ACTION_KEY_STREAM_CMD, ACTION_KEY_TUNE_REQUEST});
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UHD_LOG_INFO("TEST", "Priming mock source node props");
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mock_source_term.set_edge_property<std::string>(
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"type", "sc16", {res_source_info::OUTPUT_EDGE, 0});
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mock_source_term.set_edge_property<double>(
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"scaling", 1.0, {res_source_info::OUTPUT_EDGE, 0});
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mock_source_term.set_edge_property<double>(
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"samp_rate", DEFAULT_RATE / TEST_INTERP, {res_source_info::OUTPUT_EDGE, 0});
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UHD_LOG_INFO("TEST", "Priming mock sink node props");
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mock_sink_term.set_edge_property<std::string>(
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"type", "sc16", {res_source_info::INPUT_EDGE, 0});
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mock_sink_term.set_edge_property<double>(
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"scaling", 1.0, {res_source_info::INPUT_EDGE, 0});
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mock_sink_term.set_edge_property<double>(
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"samp_rate", DEFAULT_RATE, {res_source_info::INPUT_EDGE, 0});
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#define CHECK_OUTPUT_RATE(req_rate) \
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BOOST_REQUIRE_CLOSE(mock_sink_term.get_edge_property<double>( \
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"samp_rate", {res_source_info::INPUT_EDGE, 0}), \
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req_rate, \
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1e-6);
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UHD_LOG_INFO("TEST", "Creating graph...");
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graph.connect(&mock_source_term, test_duc.get(), edge_info);
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graph.connect(test_duc.get(), &mock_sink_term, edge_info);
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UHD_LOG_INFO("TEST", "Committing graph...");
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graph.commit();
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UHD_LOG_INFO("TEST", "Commit complete.");
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CHECK_OUTPUT_RATE(DEFAULT_RATE);
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// We need to set the interpation again, because the rates will screw it
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// change it w.r.t. to the previous setting
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test_duc->set_property<int>("interp", TEST_INTERP, 0);
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BOOST_CHECK_EQUAL(test_duc->get_property<int>("interp", 0), TEST_INTERP);
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BOOST_CHECK(mock_source_term.get_edge_property<double>(
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"samp_rate", {res_source_info::OUTPUT_EDGE, 0})
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* TEST_INTERP
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== mock_sink_term.get_edge_property<double>(
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"samp_rate", {res_source_info::INPUT_EDGE, 0}));
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// Output rate should remain unchanged
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CHECK_OUTPUT_RATE(DEFAULT_RATE);
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const double initial_input_scaling = mock_source_term.get_edge_property<double>(
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"scaling", {res_source_info::OUTPUT_EDGE, 0});
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const double initial_output_scaling = mock_sink_term.get_edge_property<double>(
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"scaling", {res_source_info::INPUT_EDGE, 0});
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// Our chosen interpolation value will cause some scaling issues, so
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// this value needs to be off from 1.0
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BOOST_CHECK(initial_input_scaling != 1.0);
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BOOST_CHECK(initial_output_scaling == 1.0);
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// The DUC will not let us set the scaling on its input, so the following
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// call to set property should have no effect
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mock_source_term.set_edge_property<double>(
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"scaling", 42.0, {res_source_info::OUTPUT_EDGE, 0});
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BOOST_CHECK(initial_input_scaling
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== mock_source_term.get_edge_property<double>(
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"scaling", {res_source_info::OUTPUT_EDGE, 0}));
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BOOST_CHECK(initial_output_scaling
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== mock_sink_term.get_edge_property<double>(
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"scaling", {res_source_info::INPUT_EDGE, 0}));
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// However, if we change the scaling on the DUC's output, that will
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// propagate to its input
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UHD_LOG_INFO("TEST", "Testing doubling the output scaling...");
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mock_sink_term.set_edge_property<double>(
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"scaling", 2.0, {res_source_info::INPUT_EDGE, 0});
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const double doubled_input_scaling = mock_source_term.get_edge_property<double>(
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"scaling", {res_source_info::OUTPUT_EDGE, 0});
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BOOST_CHECK_EQUAL(doubled_input_scaling, 2 * initial_input_scaling);
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BOOST_CHECK_CLOSE(test_duc->get_input_rates(0).start(),
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DEFAULT_RATE / ((1 << num_hb) * max_cic),
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1e-6);
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BOOST_CHECK_CLOSE(test_duc->get_input_rates(0).stop(), DEFAULT_RATE, 1e-6);
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BOOST_CHECK_CLOSE(test_duc->get_frequency_range(0).start(), -DEFAULT_RATE / 2, 1e-6);
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BOOST_CHECK_CLOSE(test_duc->get_frequency_range(0).stop(), DEFAULT_RATE / 2, 1e-6);
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UHD_LOG_INFO("TEST",
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"Setting freq to 1/8 of input rate (to " << (DEFAULT_RATE / 8) / 1e6 << " MHz)");
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constexpr double TEST_FREQ = DEFAULT_RATE / 8;
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test_duc->set_property<double>("freq", TEST_FREQ, 0);
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const uint32_t freq_word_1 = duc_reg_iface->write_memory.at(ver.freq_addr);
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BOOST_REQUIRE(freq_word_1 != 0);
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UHD_LOG_INFO(
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"TEST", "Doubling input rate (to " << (DEFAULT_RATE / 4) / 1e6 << " MHz)");
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// Now this should change the freq word, but not the absolute frequency
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mock_sink_term.set_edge_property<double>("samp_rate",
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2
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* mock_sink_term.get_edge_property<double>(
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"samp_rate", {res_source_info::INPUT_EDGE, 0}),
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{res_source_info::INPUT_EDGE, 0});
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const double freq_word_2 = duc_reg_iface->write_memory.at(ver.freq_addr);
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// The frequency word is the phase increment, which will halve. We skirt
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// around fixpoint/floating point accuracy issues by using CLOSE.
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BOOST_CHECK_CLOSE(double(freq_word_1) / double(freq_word_2), 2.0, 1e-6);
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// Reset the interpolation
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test_duc->set_property<int>("interp", TEST_INTERP, 0);
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BOOST_REQUIRE_EQUAL(test_duc->get_property<int>("interp", 0), TEST_INTERP);
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UHD_LOG_INFO("TEST", "DUC: Testing action forwarding");
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auto new_stream_cmd_action =
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stream_cmd_action_info::make(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
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new_stream_cmd_action->stream_cmd.num_samps = 1000;
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node_accessor.post_action(
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&mock_sink_term, {res_source_info::INPUT_EDGE, 0}, new_stream_cmd_action);
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BOOST_REQUIRE(!mock_source_term.received_actions.empty());
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auto stream_cmd_recv_by_src = std::dynamic_pointer_cast<stream_cmd_action_info>(
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mock_source_term.received_actions.back());
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BOOST_CHECK(stream_cmd_recv_by_src);
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BOOST_CHECK_EQUAL(stream_cmd_recv_by_src->stream_cmd.num_samps, 1000 / TEST_INTERP);
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auto new_stream_cmd_action2 =
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stream_cmd_action_info::make(uhd::stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
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node_accessor.post_action(
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&mock_sink_term, {res_source_info::INPUT_EDGE, 0}, new_stream_cmd_action2);
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BOOST_REQUIRE(!mock_source_term.received_actions.empty());
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auto stream_cmd_recv_by_src2 = std::dynamic_pointer_cast<stream_cmd_action_info>(
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mock_source_term.received_actions.back());
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BOOST_CHECK_EQUAL(stream_cmd_recv_by_src2->stream_cmd.stream_mode,
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uhd::stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
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auto new_stream_cmd_action3 =
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stream_cmd_action_info::make(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
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new_stream_cmd_action3->stream_cmd.num_samps = 100;
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node_accessor.post_action(
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&mock_source_term, {res_source_info::OUTPUT_EDGE, 0}, new_stream_cmd_action3);
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BOOST_REQUIRE(!mock_sink_term.received_actions.empty());
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auto stream_cmd_recv_by_src3 = std::dynamic_pointer_cast<stream_cmd_action_info>(
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mock_sink_term.received_actions.back());
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BOOST_CHECK(stream_cmd_recv_by_src3);
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BOOST_CHECK_EQUAL(stream_cmd_recv_by_src3->stream_cmd.num_samps, 100 * TEST_INTERP);
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UHD_LOG_INFO("TEST", "DUC: Testing Tune Request action forwarding");
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uhd::tune_request_t tune_request(70e6, 20e6);
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auto tune_req_action = uhd::rfnoc::tune_request_action_info::make(tune_request);
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tune_req_action->tune_request = tune_request;
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node_accessor.post_action(
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&mock_sink_term, {res_source_info::INPUT_EDGE, 0}, tune_req_action);
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BOOST_REQUIRE(!mock_source_term.received_actions.empty());
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auto tune_req_received = std::dynamic_pointer_cast<tune_request_action_info>(
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mock_source_term.received_actions.back());
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BOOST_CHECK(tune_req_received);
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BOOST_CHECK_EQUAL(
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std::abs(tune_req_received->tune_request.target_freq), tune_request.target_freq);
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BOOST_CHECK_CLOSE(tune_req_received->tune_result.target_dsp_freq,
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tune_req_received->tune_result.actual_dsp_freq,
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1e-5);
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}
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BOOST_AUTO_TEST_CASE(test_duc_block_v0)
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{
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test_duc_block(duc_block_control::REG_ADDRS_V0);
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}
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BOOST_AUTO_TEST_CASE(test_duc_block_v1)
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{
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test_duc_block(duc_block_control::REG_ADDRS_V1);
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}
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