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Added variants for the DDC/DUC blocks that can process multiple samples per cycle and can be used for bandwidths higher than 200Mhz. This new feature is integrated into the existing RFNoC DDC/DUC blocks. Depending on the Radio bandwidth specified for the USRP variant, the DxC blocks will instantiate the existing singlesample implementation(for FPGA image variants <= 200MHz) or instantiate the multisample implementation(for FPGA image variants > 200MHz). Co-authored-by: Niels Garibaldi <niels.steffen.garibaldi@emerson.com> Co-authored-by: André Zoch <andre.zoch@emerson.com> Co-authored-by: Meghana Halladamath <meghana.halladamath@emerson.com> Co-authored-by: Wade Fife <wade.fife@ettus.com> Co-authored-by: Max Köhler <max.koehler@emerson.com>
75 lines
1.5 KiB
Makefile
75 lines
1.5 KiB
Makefile
#
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# Copyright 2013 Ettus Research LLC
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# Copyright 2016 Ettus Research, a National Instruments Company
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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##################################################
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# HB Filter Includes
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##################################################
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include $(BASE_DIR)/../lib/dsp/hb_filter/Makefile.srcs
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##################################################
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# DSP Sources
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##################################################
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DSP_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/dsp/, \
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acc.v \
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add2_and_clip_reg.v \
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add2_and_clip.v \
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add2_and_round_reg.v \
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add2_and_round.v \
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add2_reg.v \
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add2.v \
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add_then_mac.v \
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cic_decim.v \
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cic_dec_shifter.v \
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cic_interp.v \
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cic_int_shifter.v \
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cic_strober.v \
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clip_reg.v \
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clip.v \
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cordic_stage.v \
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cordic_z24.v \
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ddc_chain.v \
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duc_chain.v \
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hb47_int.v \
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hb_dec.v \
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hb_interp.v \
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mult_add_clip.v \
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round_reg.v \
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round_sd.v \
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round.v \
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rx_dcoffset.v \
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rx_frontend.v \
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sign_extend.v \
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small_hb_dec.v \
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small_hb_int.v \
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srl.v \
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tx_frontend.v \
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variable_delay_line.v \
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axi_fir_multisample_filter.sv \
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axis_fir_ms_preload.sv \
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complex_multiply.sv \
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complex_multiply_iq.sv \
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complex_multiply_stb.sv \
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timed_complex_gain_regs.svh \
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timed_complex_gain.sv \
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utils/cic_utils_pkg.sv \
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cic_integrator.sv \
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cic_integrator_core.sv \
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cic_staircase_pipeline.sv \
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cic_destaircase_pipeline.sv \
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dsp48_add3.sv \
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dsp48_accum.sv \
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dsp48_prefix_accum.sv \
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cic_decimator.sv \
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cic_interpolator.sv \
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cic_comb_filter.sv \
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cic_barrel_shift.sv \
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cic_filter_decim.sv \
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cic_filter_interp.sv \
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))
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DSP_SRCS += $(HB_FILTER_SRCS)
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