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fpga: lib: Fix IPv4 CHDR TUSER width

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Fix the TUSER width for some buses in eth_ipv4_chdr_adapter. This
allows wider CHDR widths to be used with 10 GbE.
This commit is contained in:
Wade Fife 2023-06-10 15:54:23 -05:00
parent ffb0644d4f
commit f0ed58f751
1 changed files with 2 additions and 2 deletions
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4
fpga/usrp3/lib/rfnoc/xport_sv/eth_ipv4_chdr_adapter.sv
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@ -259,10 +259,10 @@ module eth_ipv4_chdr_adapter #(
//---------------------------------------
// tUser = {*not used*}
AxiStreamIf #(.DATA_WIDTH(CHDR_W),.USER_WIDTH(ENET_USER_W),.TKEEP(0))
AxiStreamIf #(.DATA_WIDTH(CHDR_W),.USER_WIDTH(CHDR_USER_W),.TKEEP(0))
v2e1D(v2e.clk,v2e.rst);
// tUser = {*not used*}
AxiStreamIf #(.DATA_WIDTH(CHDR_W),.USER_WIDTH(ENET_USER_W),.TKEEP(0))
AxiStreamIf #(.DATA_WIDTH(CHDR_W),.USER_WIDTH(CHDR_USER_W),.TKEEP(0))
v2e1(v2e.clk,v2e.rst);
// tUser = {*not used*}
AxiStreamIf #(.DATA_WIDTH(ENET_W),.USER_WIDTH(ENET_USER_W),.TKEEP(0))