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fpga: tools: capture xsim fatal error in testbench execution

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Max Köhler 2026-08-18 15:15:28 +02:00 committed by Wade Fife
parent 1c0dfa23d8
commit e503aaff88
1 changed files with 13 additions and 1 deletions
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14
fpga/usrp3/tools/utils/run_testbenches.py
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@ -210,9 +210,21 @@ def parse_output(simout):
]
m_error = re.search("".join(tb_match_error), plain_simout)
# Check for a fatal error, which does not always give a non-zero return
# code. For example:
#
# FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional
# condition from which it cannot recover. Process will terminate. For
# technical support on this issue, please open a WebCase with this project
# attached at http://www.xilinx.com/support."
#
m_fatal_error = re.search("^FATAL_ERROR:", plain_simout, re.MULTILINE)
# Figure out the return code
retcode = RETCODE_UNKNOWN_ERR
if m_fmt0 is not None or m_fmt1 is not None:
if m_fatal_error is not None:
retcode = RETCODE_EXEC_ERR
elif m_fmt0 is not None or m_fmt1 is not None:
retcode = RETCODE_SUCCESS
if m_fmt0 is not None:
results["passed"] = m_fmt0.group(6) == b"PASSED" and m_error is None