images: update x440 FPGA image

The X440 FPGA binaries from x4xx_x440_fpga_default-g7acd179.zip
were successfully validated to synchronize the second timekeeper.
This commit is contained in:
Joerg Hofrichter 2024-06-26 09:35:46 +02:00 committed by joergho
parent f7efcbf5b3
commit e0564299ed

View File

@ -6,7 +6,7 @@ x4xx_x410_fpga_default uhd-c37b318 x4xx/uhd-c37b318/x4xx_x410_fpg
x4xx_x410_cpld_default uhd-6fd9f37 x4xx/uhd-6fd9f37/x4xx_x410_cpld_default-g6fd9f37.zip 74e09bedda84105258484217d4dbf68860ce2079d27cf8352952fe8e4d727e93
x4xx_zbx_cpld_default uhd-8d022b3 x4xx/uhd-8d022b3/x4xx_zbx_cpld_default-g8d022b3.zip 95993c736d48e22cbdb453a606189378a420f62280b4fb387cbe0272b146044b
# X440-Series
x4xx_x440_fpga_default uhd-c37b318 x4xx/uhd-c37b318/x4xx_x440_fpga_default-gc37b318.zip 26408878cf8789ad9a227a74323e7f5f76c11e75ccd1ff4a755af222154cf02a
x4xx_x440_fpga_default uhd-7acd179 x4xx/uhd-7acd179/x4xx_x440_fpga_default-g7acd179.zip 3d9e986eb8ada60239bcc9df514d5ca80cb9706c1a4a8c7a93a3d8517189f63c
x4xx_x440_cpld_default uhd-f5bb3e0 x4xx/uhd-f5bb3e0/x4xx_x440_cpld_default-gf5bb3e0.zip 1c929c125b868bac47e027e4351ca8f3cbafc8ea517fff24693a1801955eb4db
# X410-Series Filesystems
x4xx_common_sdk_default meta-ettus-v4.7.0.0-rc1 x4xx/meta-ettus-v4.7.0.0-rc1/x4xx_common_sdk_default-v4.7.0.0-rc1.zip 0