hero123457/uhd
1
0
Fork 0
mirror of https://github.com/EttusResearch/uhd.git synced 2026-10-25 17:36:10 +00:00
Code Issues Projects Releases Wiki Activity

docs: Fixed doxygen warnings

Browse Source
This commit is contained in:
sugandhagupta 2017-06-29 15:10:27 -07:00 committed by Martin Braun
parent c33928d2bb
commit c77bd0c46a
4 changed files with 35 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
host/include/uhd/rfnoc/block_ctrl_base.hpp
View File

@ -173,6 +173,7 @@ public:
*
* \param reg The settings register to write to.
* \param data New value of this register.
* \param port Port on which to write
*/
void sr_write(const uint32_t reg, const uint32_t data, const size_t port = 0);
@ -224,7 +225,7 @@ public:
* instead of a numeric address. The register name must be
* defined in the block definition file.
*
* \param addr The user register address.
* \param reg The user register address.
* \param port Port on which to read
* \returns the readback value.
* \throws uhd::key_error if \p reg is not a valid register name
@ -252,6 +253,7 @@ public:
* \param reg The user register name.
* \returns the readback value.
* \throws uhd::key_error if \p reg is not a valid register name
* \param port Port from which to read
*/
uint32_t user_reg_read32(const std::string &reg, const size_t port = 0);
@ -271,8 +273,8 @@ public:
/*! Sets a tick rate for the command timebase.
*
* \param the tick rate in Hz
* \port port Port
* \param tick_rate The tick rate in Hz
* \param port Port
*/
void set_command_tick_rate(const double tick_rate, const size_t port = ANY_PORT);

3
host/include/uhd/rfnoc/source_block_ctrl_base.hpp
View File

@ -60,6 +60,7 @@ public:
* See also register_upstream_block().
*
* \param stream_cmd The stream command.
* \param chan Channel
*/
virtual void issue_stream_cmd(const uhd::stream_cmd_t &stream_cmd, const size_t chan=0);
@ -109,7 +110,7 @@ public:
* \param buf_size_pkts The size of the downstream block's input FIFO size in number of packets. Setting
* this to zero disables flow control. The block will then produce data as fast as it can.
* \b Warning: This can cause head-of-line blocking, and potentially lock up your device!
* \param Specify on which outgoing port this setting is valid.
* \param block_port Specify on which outgoing port this setting is valid.
* \param sid The SID for which this is valid. This is meant for cases where the outgoing block port is
* not sufficient to set the flow control, and as such is rarely used.
*/

38
host/lib/usrp/common/fx2_ctrl.hpp
View File

@ -60,7 +60,7 @@ public:
virtual void usrp_fx2_reset(void) = 0;
/*!
* Load firmware in Intel HEX Format onto device
* Load firmware in Intel HEX Format onto device
* \param filename name of firmware file
* \param force reload firmware if already loaded
*/
@ -68,24 +68,25 @@ public:
bool force = false) = 0;
/*!
* Load fpga file onto usrp
* \param filename name of fpga image
* Load fpga file onto usrp
* \param filename name of fpga image
*/
virtual void usrp_load_fpga(std::string filename) = 0;
/*!
* Load USB descriptor file in Intel HEX format into EEPROM
* \param filename name of EEPROM image
* \param filestring name of EEPROM image
*/
virtual void usrp_load_eeprom(std::string filestring) = 0;
/*!
* Submit an IN transfer
* \param request device specific request
* Submit an IN transfer
* \param request device specific request
* \param value device specific field
* \param index device specific field
* \param buff buffer to place data
* \return number of bytes read or error
* \param length length of buffer
* \return number of bytes read or error
*/
virtual int usrp_control_read(uint8_t request,
uint16_t value,
@ -94,12 +95,13 @@ public:
uint16_t length) = 0;
/*!
* Submit an OUT transfer
* \param request device specific request
* Submit an OUT transfer
* \param request device specific request
* \param value device specific field
* \param index device specific field
* \param buff buffer of data to be sent
* \return number of bytes written or error
* \param buff buffer of data to be sent
* \param length length of buffer
* \return number of bytes written or error
*/
virtual int usrp_control_write(uint8_t request,
uint16_t value,
@ -110,25 +112,25 @@ public:
/*!
* Perform an I2C write
* \param i2c_addr I2C device address
* \param buf data to be written
* \param buf data to be written
* \param len length of data in bytes
* \return number of bytes written or error
* \return number of bytes written or error
*/
virtual int usrp_i2c_write(uint16_t i2c_addr,
unsigned char *buf,
unsigned char *buf,
uint16_t len) = 0;
/*!
* Perform an I2C read
* \param i2c_addr I2C device address
* \param buf data to be read
* \param buf data to be read
* \param len length of data in bytes
* \return number of bytes read or error
* \return number of bytes read or error
*/
virtual int usrp_i2c_read(uint16_t i2c_addr,
unsigned char *buf,
unsigned char *buf,
uint16_t len) = 0;
//! enable/disable the rx path

12
host/lib/usrp/cores/gpio_atr_3000.hpp
View File

@ -39,7 +39,7 @@ public:
*
* \param iface register iface to GPIO ATR registers
* \param base base settings offset for GPIO ATR registers
* \param base readback offset for GPIO ATR registers
* \param rb_addr readback offset for GPIO ATR registers
*/
static sptr make(
uhd::wb_iface::sptr iface,
@ -119,7 +119,7 @@ public:
*
* \param iface register iface to GPIO ATR registers
* \param base base settings offset for GPIO ATR registers
* \param base readback offset for GPIO ATR registers
* \param rb_addr readback offset for GPIO ATR registers
*/
static sptr make(
uhd::wb_iface::sptr iface,
@ -131,6 +131,7 @@ public:
*
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value if value[i] is 1, the i'th bit is in ATR mode otherwise it is in GPIO mode
* \param mask mask
*/
virtual void set_pin_ctrl(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
@ -141,6 +142,7 @@ public:
*
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value if value[i] is 1, the i'th bit is an output otherwise it is an input
* \param mask mask
*/
virtual void set_gpio_ddr(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;
@ -149,9 +151,10 @@ public:
/*!
* Write the specified value to the ATR register (all bits)
*
* \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
* \param value the value to write
* \param mask mask
*/
virtual void set_atr_reg(const db_unit_t unit, const gpio_atr_reg_t atr, const uint32_t value, const uint32_t mask) = 0;
@ -160,8 +163,9 @@ public:
/*!
* Write the specified value to the GPIO register (all bits)
*
* \param atr the type of ATR register to write to {IDLE, RX, TX, FDX}
* \param unit the side of the daughterboard interface to configure (TX or RX)
* \param value the value to write
* \param mask mask
*/
virtual void set_gpio_out(const db_unit_t unit, const uint32_t value, const uint32_t mask) = 0;