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b300: disallow changing clock source mid-session

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This commit is contained in:
Grant Meyerhoff 2026-08-21 11:33:50 -05:00 committed by mkoop-ni
parent 9291d7e18b
commit bc64ff0ad6
3 changed files with 20 additions and 0 deletions
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16
host/lib/usrp/b300/b300_mb_controller.cpp
View File

@ -39,6 +39,7 @@ b300_mb_controller::b300_mb_controller(b300_clock_ctrl::sptr clock_ctrl,
, _pcie_neg_speed_gtps(0.0)
, _pcie_max_width(0)
, _pcie_neg_width(0)
, _radio_initialized(false)
{
const auto decode_speed_gtps = [](uint32_t code) {
switch (code) {
@ -291,6 +292,16 @@ std::vector<std::string> b300_mb_controller::get_clock_sources() const
void b300_mb_controller::set_sync_source(
const std::string& clock_source, const std::string& time_source)
{
// If the clocking is changed after the ADRV9032 has been initialized, the signal is
// completely gone. If we want to support this in the future, we will likely need to
// reset or reinitialize some pieces of the ADRV9032, such as the JESD and clocking.
if (_radio_initialized
&& (clock_source != _current_clock_source
|| time_source != _current_time_source)) {
throw uhd::runtime_error(
"Cannot change clock or time source after radio has been initialized. Please "
"set clock and time source via device arguments during initialization.");
}
auto valid_sync_sources = get_sync_sources();
std::pair<std::string, std::string> source_pair{clock_source, time_source};
if (std::find_if(valid_sync_sources.cbegin(),
@ -741,4 +752,9 @@ void b300_mb_controller::finish_multi_device_sync()
get_timekeeper(0)->set_time_next_pps(uhd::time_spec_t(0.0));
}
void b300_mb_controller::set_radio_initialized(const bool initialized)
{
_radio_initialized = initialized;
}
}} // namespace uhd::rfnoc

2
host/lib/usrp/b300/b300_mb_controller.hpp
View File

@ -103,6 +103,7 @@ public:
void setup_multi_device_sync();
void configure_lmk_for_sync();
void finish_multi_device_sync();
void set_radio_initialized(const bool initialized);
private:
uhd::soft_reg_field_t _get_gpio_field(size_t index);
@ -123,6 +124,7 @@ private:
// PCIe link widths expressed as lane counts (e.g., 1, 4, 8 for x1/x4/x8).
uint16_t _pcie_max_width;
uint16_t _pcie_neg_width;
bool _radio_initialized;
};
}} // namespace uhd::rfnoc

2
host/lib/usrp/b300/b300_radio_control.cpp
View File

@ -157,6 +157,8 @@ b300_radio_control_impl::b300_radio_control_impl(make_args_ptr make_args)
// Power down the LMK SYSREF since it is no longer needed and can cause RF spurs
// during operation.
_clock_ctrl->power_down_lmk04832_sysref();
_mb_control->set_radio_initialized(true);
}
size_t b300_radio_control_impl::get_chan_from_dboard_fe(