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SelfCal: improve fbx input spur performance

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Modify the cal_freq used in the calibration procedure by X440 devices
which use the FBX daughterboard. The new value obeys the rules that are
specified mainly in the PG269 to help the background calibration (BG)
run under better conditions and hence improve our input spur performance.

Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
Co-authored-by: Volkan Öz <volkan.oez@ni.com>
This commit is contained in:
Virendra Kakade 2023-08-31 12:51:06 -05:00 committed by Aki Tomita
parent 8cb20c8671
commit 8fb48ad48d
2 changed files with 15 additions and 4 deletions
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15
host/lib/include/uhdlib/usrp/dboard/fbx/fbx_dboard.hpp
View File

@ -80,8 +80,19 @@ public:
{
// FBX uses a fixed low freq for both TX and RX
return {
100e6, // rx_freq
100e6, // tx_freq
// Some conditions were considered for choosing the correct cal_freq,
// mainly using the PG269 manual as reference. These conditions ensure that
// the cal_freq or its harmonics don't interfere with the background (BG)
// calibration mechanism on the RFSoC.
// 1. In calib_mode2 the highest supported frequency is 0.4 * converter rate (fc).
// The minimum fc that X440 supports is 1GHz. So our highest cal_freq is 400MHz.
// 2. We need to choose as high a cal_freq as we can
// 3. The converter rate (fc) should not be a multiple of the cal_freq
// 4. The converter rate (fc) / 8 should not be a multiple the cal_freq
// 5. cal_freq should not be of a form k * (fc / 1024) where k = 1 to 1024
// 6. The specified hysteresis threshold values work with the chosen cal_freq
397.55e6, // rx_freq
397.55e6, // tx_freq
{0x7FFF, 0}, // output full scale dac mux
100, // delay
4000, // under

4
host/utils/x4xx_query_adc_threshold.py
View File

@ -55,8 +55,8 @@ def settings(usrp):
if is_x440(usrp):
return {
"gain": None,
"rx_freq": 100e6,
"tx_freq": 100e6
"rx_freq": 397.55e6,
"tx_freq": 397.55e6
}
print("Unknown x4xx device")
sys.exit(1)