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fpga: ci: Add testbench pipeline
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fpga/.ci/hwtools/root.py
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32
fpga/.ci/hwtools/root.py
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#!/usr/bin/env python
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#
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# Copyright 2021 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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# Description:
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#
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# Setup script for configuring the pipeline agent's environment to allow us
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# to run proprietary EDA vendor tools.
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#
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import sys
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def do_setup():
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from rootapiclass import rootapi
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rootapi.set_workspace_name(name="uhddev", pretty_name="UHD FPGA")
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rootapi.set_major_version("1")
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rootapi.add_tool(name="hwtools", version="head")
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rootapi.add_tool(name="Vivado", version="2019.1", allowlater=False)
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rootapi.add_tool(name="modelsim", version="2020.4", allowlater=True)
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def do_finish():
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pass
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def do_publish():
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pass
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if __name__ == "__main__":
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sys.exit(-1)
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74
fpga/.ci/oss_testbenches.yml
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fpga/.ci/oss_testbenches.yml
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#
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# Copyright 2021 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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# Description:
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#
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# This pipeline is used to run all the testbenches using ModelSim.
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#
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trigger:
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- none
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pr:
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branches:
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include:
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- master
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paths:
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include:
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- fpga/usrp3/lib
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- fpga/usrp3/tools
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- fpga/usrp3/top
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- fpga/usrp3/sim
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- fpga/.ci
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resources:
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repositories:
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- repository: hwtools
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type: git
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ref: main
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name: DevCentral/hwtools
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name:
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jobs:
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- job:
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displayName: "ModelSim Simulation"
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timeoutInMinutes: 360
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pool:
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name: Hardware
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steps:
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- checkout: self
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clean: true
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persistCredentials: true
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- checkout: hwtools
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clean: true
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path: s/hwtools/head
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persistCredentials: true
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- bash: |
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set -e
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echo "---- Set environment variables ----"
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export path_hwtools=$(Pipeline.Workspace)/s/hwtools/head/setup
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export PATH=$path_hwtools:$PATH
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echo "---- Run hwsetup ----"
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# This script sets the XILINX_VIVADO, MODELSIM, and LIB_BASE_PATH
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# variables based on the agent's configuration so we can find the EDA
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# tools.
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pushd ../.ci/hwtools
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source hwsetup.sh
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popd
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echo "---- Run setupenv ----"
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export MSIM_VIV_COMPLIBDIR=$LIB_BASE_PATH/vivado/2019.1.1/modelsim_SE-64_2020
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source ./top/x300/setupenv.sh --vivado-path $(dirname $XILINX_VIVADO) --modelsim-path $(dirname $MODELSIM)
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echo "---- Run testbenches ----"
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pushd ./tools/utils
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python3 ./run_testbenches.py --logged --simulator modelsim --excludes=modelsim.excludes -j2 run
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popd
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workingDirectory: uhddev/fpga/usrp3
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displayName: "Run Testbenches"
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