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fpga: b2xx: Add DEVICE parameter

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Adds a DEVICE parameter set to SPARTAN6 to properly indicate the FPGA
device family.
This commit is contained in:
Wade Fife 2026-09-01 16:50:45 -05:00 committed by Frank Dietze
parent d110c060f2
commit 6a8a56afb2
4 changed files with 15 additions and 9 deletions
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6
fpga/usrp3/top/b200/b200.v
View File

@ -127,6 +127,8 @@ module b200 (
output rx_bandsel_c
);
localparam DEVICE = "SPARTAN6";
wire reset_global = GPIF_CTL9;
///////////////////////////////////////////////////////////////////////
@ -281,7 +283,7 @@ module b200 (
///////////////////////////////////////////////////////////////////////
wire [9:0] fp_gpio_in, fp_gpio_out, fp_gpio_ddr;
b200_core #(.EXTRA_BUFF_SIZE(12)) b200_core
b200_core #(.EXTRA_BUFF_SIZE(12), .DEVICE(DEVICE)) b200_core
(
.bus_clk(bus_clk), .bus_rst(bus_rst),
.tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
@ -341,7 +343,7 @@ module b200 (
// GPIF2
///////////////////////////////////////////////////////////////////////
gpif2_slave_fifo32 #(.DATA_RX_FIFO_SIZE(13), .DATA_TX_FIFO_SIZE(13)) slave_fifo32
gpif2_slave_fifo32 #(.DATA_RX_FIFO_SIZE(13), .DATA_TX_FIFO_SIZE(13), .DEVICE(DEVICE)) slave_fifo32
(
.gpif_clk(gpif_clk), .gpif_rst(gpif_rst), .gpif_enb(1'b1),
.gpif_ctl({GPIF_CTL8, GPIF_CTL6, GPIF_CTL5, GPIF_CTL4}), .fifoadr({GPIF_CTL11,GPIF_CTL12}),

7
fpga/usrp3/top/b200/b200_core.v
View File

@ -20,7 +20,8 @@ module b200_core
parameter DEMUX_SID_MASK = 8'hf0,
parameter EXTRA_BUFF_SIZE = 0,
parameter RADIO_FIFO_SIZE = 11,
parameter SAMPLE_FIFO_SIZE = 11
parameter SAMPLE_FIFO_SIZE = 11,
parameter DEVICE = "SPARTAN6"
)
(
@ -307,7 +308,7 @@ module b200_core
.NEW_HB_DECIM(1),
.SOURCE_FLOW_CONTROL(0),
.USER_SETTINGS(0),
.DEVICE("SPARTAN6")
.DEVICE(DEVICE)
) radio_0 (
.radio_clk(radio_clk), .radio_rst(radio_rst),
.rx(rx0), .tx(tx0), .pps(pps), .time_sync(time_sync_r),
@ -339,7 +340,7 @@ module b200_core
.NEW_HB_DECIM(1),
.SOURCE_FLOW_CONTROL(0),
.USER_SETTINGS(0),
.DEVICE("SPARTAN6")
.DEVICE(DEVICE)
) radio_1 (
.radio_clk(radio_clk), .radio_rst(radio_rst),
.rx(rx1), .tx(tx1), .pps(pps), .time_sync(time_sync_r),

6
fpga/usrp3/top/b2xxmini/b205.v
View File

@ -83,6 +83,8 @@ module b205 (
);
localparam DEVICE = "SPARTAN6";
wire reset_global = FX3_CTL9;
///////////////////////////////////////////////////////////////////////
@ -247,7 +249,7 @@ module b205 (
// b205 core
///////////////////////////////////////////////////////////////////////
wire [7:0] fp_gpio_in, fp_gpio_out, fp_gpio_ddr;
b205_core #(.EXTRA_BUFF_SIZE(12)) b205_core
b205_core #(.EXTRA_BUFF_SIZE(12), .DEVICE(DEVICE)) b205_core
(
.bus_clk(bus_clk), .bus_rst(bus_rst),
.tx_tdata(tx_tdata), .tx_tlast(tx_tlast), .tx_tvalid(tx_tvalid), .tx_tready(tx_tready),
@ -279,7 +281,7 @@ module b205 (
///////////////////////////////////////////////////////////////////////
// GPIF2
///////////////////////////////////////////////////////////////////////
gpif2_slave_fifo32 #(.DATA_RX_FIFO_SIZE(13), .DATA_TX_FIFO_SIZE(13)) slave_fifo32
gpif2_slave_fifo32 #(.DATA_RX_FIFO_SIZE(13), .DATA_TX_FIFO_SIZE(13), .DEVICE(DEVICE)) slave_fifo32
(
.gpif_clk(bus_clk), .gpif_rst(bus_rst), .gpif_enb(1'b1),
.gpif_ctl({FX3_CTL8, FX3_CTL6, FX3_CTL5, FX3_CTL4}), .fifoadr({FX3_CTL11, FX3_CTL12}),

5
fpga/usrp3/top/b2xxmini/b205_core.v
View File

@ -18,7 +18,8 @@ module b205_core
parameter DEMUX_SID_MASK = 8'hf0,
parameter EXTRA_BUFF_SIZE = 0,
parameter RADIO_FIFO_SIZE = 11,
parameter SAMPLE_FIFO_SIZE = 11
parameter SAMPLE_FIFO_SIZE = 11,
parameter DEVICE = "SPARTAN6"
)
(
@ -232,7 +233,7 @@ module b205_core
.NEW_HB_DECIM(1),
.SOURCE_FLOW_CONTROL(0),
.USER_SETTINGS(0),
.DEVICE("SPARTAN6")
.DEVICE(DEVICE)
) radio (
.radio_clk(radio_clk), .radio_rst(radio_rst),
.rx(rx0), .tx(tx0), .pps(pps), .time_sync(time_sync_r),