From 632f9927e5fe577a21e38407af978043da8ed2e7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Max=20K=C3=B6hler?= Date: Mon, 5 Oct 2026 21:51:28 +0200 Subject: [PATCH] host: x4xx: update default wait time for NCO reset --- host/lib/include/uhdlib/usrp/common/x400_rfdc_control.hpp | 3 +++ host/lib/usrp/x400/x400_rfdc_control.cpp | 5 +++-- host/tests/rfnoc_block_tests/x4xx_radio_block_test.cpp | 3 ++- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/host/lib/include/uhdlib/usrp/common/x400_rfdc_control.hpp b/host/lib/include/uhdlib/usrp/common/x400_rfdc_control.hpp index 7e42b6aa0..5716c1cd7 100644 --- a/host/lib/include/uhdlib/usrp/common/x400_rfdc_control.hpp +++ b/host/lib/include/uhdlib/usrp/common/x400_rfdc_control.hpp @@ -24,6 +24,9 @@ class rfdc_control public: using sptr = std::shared_ptr; + //! Default SYSREF wait time for an NCO reset, in SYSREF cycles + static constexpr uint32_t DEFAULT_SYSREF_WAIT_CYCLES = 14; + struct regmap { //! Address of the NCO reset register diff --git a/host/lib/usrp/x400/x400_rfdc_control.cpp b/host/lib/usrp/x400/x400_rfdc_control.cpp index f9946d96a..4af00e333 100644 --- a/host/lib/usrp/x400/x400_rfdc_control.cpp +++ b/host/lib/usrp/x400/x400_rfdc_control.cpp @@ -27,8 +27,9 @@ void rfdc_control::reset_ncos( } UHD_LOG_TRACE(_log_id, "Resetting " << ncos.size() << " NCOs..."); - // Initialize the NCO reset delay to a default of 11 SYSREF cycles - constexpr uint32_t reset_word = (11 & 0xFF) << regmap::SYSREF_WAIT_LSB + // Initialize the NCO reset delay to the default number of SYSREF cycles + constexpr uint32_t reset_word = (DEFAULT_SYSREF_WAIT_CYCLES & 0xFF) + << regmap::SYSREF_WAIT_LSB | 0x1 << regmap::WRITE_SYSREF_WAIT | 1; // Initiate NCO reset diff --git a/host/tests/rfnoc_block_tests/x4xx_radio_block_test.cpp b/host/tests/rfnoc_block_tests/x4xx_radio_block_test.cpp index 48214c94b..57de6cf4f 100644 --- a/host/tests/rfnoc_block_tests/x4xx_radio_block_test.cpp +++ b/host/tests/rfnoc_block_tests/x4xx_radio_block_test.cpp @@ -778,7 +778,8 @@ BOOST_FIXTURE_TEST_CASE(zbx_phase_sync_test, x400_radio_fixture) // Set reset complete bit regs[nco_sync_addr] = 1 << 1; constexpr uint32_t nco_sync_val = - (11 & 0xFF) << uhd::rfnoc::x400::rfdc_control::regmap::SYSREF_WAIT_LSB + (uhd::rfnoc::x400::rfdc_control::DEFAULT_SYSREF_WAIT_CYCLES & 0xFF) + << uhd::rfnoc::x400::rfdc_control::regmap::SYSREF_WAIT_LSB | 1 << uhd::rfnoc::x400::rfdc_control::regmap::WRITE_SYSREF_WAIT | 1 << uhd::rfnoc::x400::rfdc_control::regmap::NCO_RESET_DONE_MSB | 1 << uhd::rfnoc::x400::rfdc_control::regmap::NCO_RESET_START_MSB;