From 54f185ecdd05673fd1a8a4cc071862a877ed2345 Mon Sep 17 00:00:00 2001 From: Ahmed Salman Date: Thu, 24 Sep 2026 17:43:12 +0200 Subject: [PATCH] ci: x420: add weekly hardware test coverage --- .ci/templates/stages-uhd-pipeline.yml | 4 + .../job-uhd-x420-hardware-tests-s175.yml | 122 ++++++++++-------- .ci/uhd-hardware-test-dev.yml | 24 ++++ .ci/uhd-hardware-test-weekly-pipeline.yml | 21 +++ 4 files changed, 119 insertions(+), 52 deletions(-) diff --git a/.ci/templates/stages-uhd-pipeline.yml b/.ci/templates/stages-uhd-pipeline.yml index 4674653b4..d13ae4c7a 100644 --- a/.ci/templates/stages-uhd-pipeline.yml +++ b/.ci/templates/stages-uhd-pipeline.yml @@ -998,6 +998,10 @@ stages: ${{ else }}: fpga_imgs_source: 'Filesystem' testLength: ${{ parameters.testLength }} + runPyTest: true + runPyTestNonRF: true + runDevTest: true + runSystemImageTest: true - stage: test_uhd_x4xx_saison_stage displayName: RF Test UHD x4xx saison diff --git a/.ci/templates/tests/job-uhd-x420-hardware-tests-s175.yml b/.ci/templates/tests/job-uhd-x420-hardware-tests-s175.yml index 05e1e4a95..eff791003 100644 --- a/.ci/templates/tests/job-uhd-x420-hardware-tests-s175.yml +++ b/.ci/templates/tests/job-uhd-x420-hardware-tests-s175.yml @@ -12,57 +12,75 @@ parameters: default: '' - name: testLength type: string +- name: runPyTest + type: boolean + default: true +- name: runPyTestNonRF + type: boolean + default: true +- name: runDevTest + type: boolean + default: true +- name: runSystemImageTest + type: boolean + default: true +- name: forceIQCorrections + type: boolean + default: false jobs: -- template: templates/job-uhd-x4xx-hardware-tests.yml - parameters: - suiteName: 'dre_s175_x420_3' - toolset: 'make' - runPyTest: true - runPyTestNonRF: false - runDevTest: false - runSystemImageTest: false - master_clock_rate: '245.76e6' - uhdArtifactSource: ${{ parameters.uhdArtifactSource }} - uhdFpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }} - fpga_imgs_source: ${{ parameters.fpga_imgs_source }} - extra_rf_test_args: '${{ parameters.extra_rf_test_args }}' - testLength: '${{ parameters.testLength }}' - dutMatrix: - dre_s175-x420-3: - dutName: 'dre_s175-x420-3' - dutType: 'x4xx' - devtestPattern: 'x420' - dutFPGA: 'CG_1000' - dutEmbeddedImagesArtifact: 'x4xx-images' - uartSerial: '$(x420_uartSerial)' - pipelineAgent: dre-s175-x420-3 - pytestAtsConfig: ec21_ats - pytestDUT: 'x420' - sfp0ip: '$(x420_dutAddr)' -- template: templates/job-uhd-x4xx-hardware-tests.yml - parameters: - suiteName: 'dre_s175_x420_4' - toolset: 'make' - runPyTest: false - runPyTestNonRF: true - runDevTest: true - runSystemImageTest: true - master_clock_rate: '245.76e6' - uhdArtifactSource: ${{ parameters.uhdArtifactSource }} - uhdFpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }} - fpga_imgs_source: ${{ parameters.fpga_imgs_source }} - extra_rf_test_args: '${{ parameters.extra_rf_test_args }}' - testLength: '${{ parameters.testLength }}' - dutMatrix: - dre_s175-x420-4: - dutName: 'dre_s175-x420-4' - dutType: 'x4xx' - devtestPattern: 'x420' - dutFPGA: 'CG_1000' - dutEmbeddedImagesArtifact: 'x4xx-images' - uartSerial: '$(x420_uartSerial)' - pipelineAgent: dre-s175-x420-4 - pytestAtsConfig: dre_s175_ats - pytestDUT: 'x420' - sfp0ip: '$(x420_dutAddr)' +- ${{ if parameters.runPyTest }}: + - template: templates/job-uhd-x4xx-hardware-tests.yml + parameters: + suiteName: 'dre_s175_x420_3' + toolset: 'make' + runPyTest: true + runPyTestNonRF: false + runDevTest: false + runSystemImageTest: false + forceIQCorrections: ${{ parameters.forceIQCorrections }} + master_clock_rate: '245.76e6' + uhdArtifactSource: ${{ parameters.uhdArtifactSource }} + uhdFpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }} + fpga_imgs_source: ${{ parameters.fpga_imgs_source }} + extra_rf_test_args: '${{ parameters.extra_rf_test_args }}' + testLength: '${{ parameters.testLength }}' + dutMatrix: + dre_s175-x420-3: + dutName: 'dre_s175-x420-3' + dutType: 'x4xx' + devtestPattern: 'x420' + dutFPGA: 'CG_1000' + dutEmbeddedImagesArtifact: 'x4xx-images' + uartSerial: '$(x420_uartSerial)' + pipelineAgent: dre-s175-x420-3 + pytestAtsConfig: ec21_ats + pytestDUT: 'x420' + sfp0ip: '$(x420_dutAddr)' +- ${{ if or(parameters.runPyTestNonRF, parameters.runDevTest, parameters.runSystemImageTest) }}: + - template: templates/job-uhd-x4xx-hardware-tests.yml + parameters: + suiteName: 'dre_s175_x420_4' + toolset: 'make' + runPyTest: false + runPyTestNonRF: ${{ parameters.runPyTestNonRF }} + runDevTest: ${{ parameters.runDevTest }} + runSystemImageTest: ${{ parameters.runSystemImageTest }} + master_clock_rate: '245.76e6' + uhdArtifactSource: ${{ parameters.uhdArtifactSource }} + uhdFpgaArtifactSource: ${{ parameters.uhdFpgaArtifactSource }} + fpga_imgs_source: ${{ parameters.fpga_imgs_source }} + extra_rf_test_args: '${{ parameters.extra_rf_test_args }}' + testLength: '${{ parameters.testLength }}' + dutMatrix: + dre_s175-x420-4: + dutName: 'dre_s175-x420-4' + dutType: 'x4xx' + devtestPattern: 'x420' + dutFPGA: 'CG_1000' + dutEmbeddedImagesArtifact: 'x4xx-images' + uartSerial: '$(x420_uartSerial)' + pipelineAgent: dre-s175-x420-4 + pytestAtsConfig: dre_s175_ats + pytestDUT: 'x420' + sfp0ip: '$(x420_dutAddr)' diff --git a/.ci/uhd-hardware-test-dev.yml b/.ci/uhd-hardware-test-dev.yml index 026e261d3..7d0b0f952 100644 --- a/.ci/uhd-hardware-test-dev.yml +++ b/.ci/uhd-hardware-test-dev.yml @@ -7,6 +7,10 @@ parameters: type: boolean displayName: Run X410 Embedded Tests default: false +- name: run_x420_embedded_tests + type: boolean + displayName: Run X420 Embedded Tests + default: false - name: run_x440_embedded_tests type: boolean displayName: Run X440 Embedded Tests @@ -209,6 +213,22 @@ stages: uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} fpga_imgs_source: ${{ variables.fpga_imgs_source }} +- stage: test_uhd_x420_embedded_stage + displayName: Test X420 Embedded UHD + dependsOn: [] + condition: ${{ parameters.run_x420_embedded_tests }} + jobs: + - template: templates/tests/job-uhd-x420-hardware-tests-s175.yml + parameters: + uhdArtifactSource: uhd_mono_pipeline + uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} + fpga_imgs_source: ${{ variables.fpga_imgs_source }} + testLength: ${{ parameters.testLength }} + runPyTest: false + runPyTestNonRF: true + runDevTest: true + runSystemImageTest: true + - stage: test_uhd_x440_embedded_stage displayName: Test X440 Embedded UHD dependsOn: [] @@ -341,6 +361,10 @@ stages: fpga_imgs_source: ${{ variables.fpga_imgs_source }} extra_rf_test_args: ${{ parameters.extra_rf_test_args }} testLength: ${{ parameters.testLength }} + runPyTest: true + runPyTestNonRF: false + runDevTest: false + runSystemImageTest: false - stage: test_x440_rf_tests displayName: Run X440 RF tests diff --git a/.ci/uhd-hardware-test-weekly-pipeline.yml b/.ci/uhd-hardware-test-weekly-pipeline.yml index f7b7c226e..90e6cf48e 100644 --- a/.ci/uhd-hardware-test-weekly-pipeline.yml +++ b/.ci/uhd-hardware-test-weekly-pipeline.yml @@ -87,6 +87,16 @@ stages: uhdArtifactSource: uhd_mono_pipeline uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} fpga_imgs_source: ${{ variables.fpga_imgs_source }} + - template: templates/tests/job-uhd-x420-hardware-tests-s175.yml + parameters: + uhdArtifactSource: uhd_mono_pipeline + uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} + fpga_imgs_source: ${{ variables.fpga_imgs_source }} + testLength: ${{ parameters.testLength }} + runPyTest: false + runPyTestNonRF: true + runDevTest: true + runSystemImageTest: true - template: templates/tests/job-uhd-x440-hardware-tests-sdr-test0.yml parameters: uhdArtifactSource: uhd_mono_pipeline @@ -128,6 +138,17 @@ stages: fpga_imgs_source: ${{ variables.fpga_imgs_source }} runX410X4400RfSubset: true testLength: ${{ parameters.testLength }} + - template: templates/tests/job-uhd-x420-hardware-tests-s175.yml + parameters: + uhdArtifactSource: uhd_mono_pipeline + uhdFpgaArtifactSource: ${{ variables.uhdFpgaArtifactSource }} + fpga_imgs_source: ${{ variables.fpga_imgs_source }} + testLength: ${{ parameters.testLength }} + runPyTest: true + runPyTestNonRF: false + runDevTest: false + runSystemImageTest: false + forceIQCorrections: true - template: templates/tests/job-uhd-x440-hardware-tests-pebbles.yml parameters: uhdArtifactSource: uhd_mono_pipeline