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mpm: Disable MTS completely for dual rate

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Since in dual rate we cannot use multi-tile sync over all tiles we
disable it completely for all tiles. For 1600 MHz bitfiles this isn't an
issue at all because the two remaining channels have different converter
rates anyway. For 400 MHz bitfiles the channels with the same rate will
not be synced, either, but will most probably have a fixed phase
difference.

Co-authored-by: Martin Braun <martin.braun@ettus.com>
This commit is contained in:
Martin Anderseck 2023-09-25 10:26:25 +02:00 committed by Aki Tomita
parent 9001c66380
commit 42c6828aeb
1 changed files with 5 additions and 19 deletions
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24
mpm/python/usrp_mpm/periph_manager/x4xx_clock_mgr.py
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@ -1120,12 +1120,8 @@ class X4xxClockManager:
sync_args_result = {}
rates = [self.rfdc.get_converter_rate(db_idx) for db_idx in range(2)]
if rates[0] != rates[1]:
self.log.debug("Synchronizing daughterboards separately.")
db_keys = [0, 1]
db_keys = [
(0, 'adc_latency0', 'dac_latency0'),
(1, 'adc_latency1', 'dac_latency1'),
]
self.log.info("Multiple master clock rates detected: Skipping Multi-Tile Synchronization, channels may not be fully synchronized!")
return sync_args_result
else:
db_keys = [('all', 'adc_latency', 'dac_latency')]
for db_key, adc_lat_key, dac_lat_key in db_keys:
@ -1157,19 +1153,9 @@ class X4xxClockManager:
'all',
int(sync_args['adc_latency']),
int(sync_args['dac_latency']))
if all(
lambda x: x in sync_args \
for x in ('adc_latency0', 'adc_latency1',
'dac_latency0', 'dac_latency1')):
return \
self.rfdc.set_tile_latencies(
0,
int(sync_args['adc_latency0']),
int(sync_args['dac_latency0'])) and \
self.rfdc.set_tile_latencies(
1,
int(sync_args['adc_latency1']),
int(sync_args['dac_latency1']))
if len(sync_args) == 0:
self.log.debug("Empty sync args, not finalizing sync settings")
return True
self.log.error("Invalid sync args provided!")
raise RuntimeError("Invalid sync args provided!")
# Go, go, go!