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Merge branch 'maint'
Conflicts: host/lib/usrp/b200/b200_io_impl.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.h
This commit is contained in:
Martin Braun
commit
2f760ac0f8
@ -29,14 +29,15 @@ schematics</a>. Once you verify that the programmer is properly connected, run t
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cd <install path>/share/uhd/images
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avrdude -p atmega128 -c <programmer name> -P usb -U efuse:w:0xFF:m -U hfuse:w:0x80:m -U lfuse:w:0xFF:m -U flash:w:octoclock_bootloader.hex:i
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**Note:** On Linux, **sudo** must be used with the **avrdude** command.
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\b Note:
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On Linux, `sudo avrdude ...` might be necessary to gain access to the programmer.
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Once the bootloader has been burned, power-cycle your OctoClock device and refer to the below instructions on burning the OctoClock's
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primary firmware.
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\subsection application Primary Octoclock firmware
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To load firmware onto the OctoClock, you must use the *octoclock_firmware_burner* utility, specifying the IP
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To load firmware onto the OctoClock, you must use the `octoclock_firmware_burner` utility, specifying the IP
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address of the OctoClock device, as follows:
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octoclock_firmware_burner --addr=192.168.10.3
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@ -45,12 +46,13 @@ address of the OctoClock device, as follows:
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\subsection host_interface Setting up the host interface
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The OctoClock communicates with the host machine at the UDP layer over Gigabit Ethernet. The default device
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of the OctoClock is **192.168.10.3**. You will need to configure the host machine's Ethernet interface with
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a static IP address to enable communication. An address of **192.168.10.1** and a subnet mask of
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**255.255.255.0** is recommended.
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The OctoClock communicates with the host machine at the UDP layer over Ethernet. The default device
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of the OctoClock is `192.168.10.3`. You will need to configure the host machine's Ethernet interface with
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a static IP address to enable communication. An address of `192.168.10.1` and a subnet mask of
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`255.255.255.0` is recommended.
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**Note:** When using UHD software, if an IP address for the OctoClock is not specified, the software will
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\b Note:
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When using UHD software, if an IP address for the OctoClock is not specified, the software will
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use UDP broadcast packets to locate the OctoClock. On some systems, the firewall will block UDP broadcast
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packets. It is recommended that you change your firewall settings.
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@ -110,17 +112,17 @@ The same applies for an external signal.
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The following sensors are available on both the OctoClock and Octoclock-G; these can be queried through the
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<a href="classuhd_1_1octoclock.html">API</a>.
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- **ext_ref_detected:** whether or not the device detects an external reference
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- **gps_detected:** whether or not the device detects an internal GPSDO
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- **using_ref:** which reference the device is using (internal or external)
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- **switch_pos:** the position of the front switch (internal or external)
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- `ext_ref_detected:` whether or not the device detects an external reference
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- `gps_detected:` whether or not the device detects an internal GPSDO
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- `using_ref:` which reference the device is using (internal or external)
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- `switch_pos:` the position of the front switch (internal or external)
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On the OctoClock-G, the following sensors are added:
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- **gps_gpgga:** the latest GPGGA string sent by the GPSDO
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- **gps_gprmc:** the latest GPRMC string sent by the GPSDO
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- **gps_time:** the time reported by the GPSDO
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- **gps_locked:** whether or not the GPSDO is locked (true/false)
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- **gps_servo:** the latest debug trace information sent by the GPSDO
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- `gps_gpgga:` the latest GPGGA string sent by the GPSDO
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- `gps_gprmc:` the latest GPRMC string sent by the GPSDO
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- `gps_time:` the time reported by the GPSDO
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- `gps_locked:` whether or not the GPSDO is locked (true/false)
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- `gps_servo:` the latest debug trace information sent by the GPSDO
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*/
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@ -152,7 +152,7 @@ metadata should have a time spec set: :
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size_t num_tx_samps = tx_streamer->send(buffs, samps_to_send, md);
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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\subsection sync_phase_lo Align LOs in the front-end (SBX, WBX, CBX)
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\subsection sync_phase_lo Align LOs in the front-end (SBX, WBX, UBX)
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Using timed commands, multiple frontends can be tuned at a specific
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time. This timed-tuning ensures that the phase offsets between VCO/PLL
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@ -161,7 +161,9 @@ chains will remain constant after each re-tune. See notes below:
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- There is a random phase offset between any two frontends
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- This phase offset is different for different LO frequencies
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- This phase offset remains constant after retuning
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- Due to a divider, WBX phase offset will be randomly +/- 180 deg after re-tune
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- Due to a divider, WBX phase offset will be randomly +/- 180 deg after re-tune on all USRPs.
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- Due to a divider, UBX phase offset will be randomly +/- 180 deg after re-tune on N200/N210.
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On X300/X310, phase sync with UBX fully works.
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- This phase offset will drift over time due to thermal and other characteristics
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- Periodic calibration will be necessary for phase-coherent applications
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@ -175,7 +175,6 @@ void b200_impl::update_tick_rate(const double new_tick_rate)
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}
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}
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double b200_impl::coerce_rx_samp_rate(rx_dsp_core_3000::sptr ddc, size_t dspno, const double rx_rate)
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{
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// Have to set tick rate first, or the ddc will change the requested rate based on default tick rate
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@ -186,6 +185,14 @@ double b200_impl::coerce_rx_samp_rate(rx_dsp_core_3000::sptr ddc, size_t dspno,
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return ddc->set_host_rate(rx_rate);
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}
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#define CHECK_BANDWIDTH(dir) \
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if (rate > _codec_ctrl->get_bw_filter_range(dir).stop()) { \
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UHD_MSG(warning) \
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<< "Selected " << dir << " bandwidth (" << (rate/1e6) << " MHz) exceeds\n" \
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<< "analog frontend filter bandwidth (" << (_codec_ctrl->get_bw_filter_range(dir).stop()/1e6) << " MHz)." \
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<< std::endl; \
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}
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void b200_impl::update_rx_samp_rate(const size_t dspno, const double rate)
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{
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boost::shared_ptr<sph::recv_packet_streamer> my_streamer =
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@ -194,6 +201,7 @@ void b200_impl::update_rx_samp_rate(const size_t dspno, const double rate)
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my_streamer->set_samp_rate(rate);
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const double adj = _radio_perifs[dspno].ddc->get_scaling_adjustment();
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my_streamer->set_scale_factor(adj);
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CHECK_BANDWIDTH("Rx");
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}
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double b200_impl::coerce_tx_samp_rate(tx_dsp_core_3000::sptr duc, size_t dspno, const double tx_rate)
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@ -214,6 +222,7 @@ void b200_impl::update_tx_samp_rate(const size_t dspno, const double rate)
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my_streamer->set_samp_rate(rate);
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const double adj = _radio_perifs[dspno].duc->get_scaling_adjustment();
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my_streamer->set_scale_factor(adj);
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CHECK_BANDWIDTH("Tx");
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}
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/***********************************************************************
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@ -1,5 +1,5 @@
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//
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// Copyright 2012-2014 Ettus Research LLC
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// Copyright 2012-2015 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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@ -133,12 +133,6 @@ public:
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{
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boost::lock_guard<boost::mutex> lock(_mutex);
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//warning for known trouble rates
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if (rate > ad9361_device_t::AD9361_RECOMMENDED_MAX_CLOCK_RATE) UHD_MSG(warning) << boost::format(
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"The requested clock rate %f MHz may cause slow configuration.\n"
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"The driver recommends a master clock rate less than %f MHz.\n"
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) % (rate/1e6) % (ad9361_device_t::AD9361_RECOMMENDED_MAX_CLOCK_RATE/1e6) << std::endl;
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//clip to known bounds
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const meta_range_t clock_rate_range = ad9361_ctrl::get_clock_rate_range();
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const double clipped_rate = clock_rate_range.clip(rate);
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@ -79,8 +79,9 @@ int get_num_taps(int max_num_taps) {
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const double ad9361_device_t::AD9361_MAX_GAIN = 89.75;
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const double ad9361_device_t::AD9361_MAX_CLOCK_RATE = 61.44e6;
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const double ad9361_device_t::AD9361_RECOMMENDED_MAX_CLOCK_RATE = 56e6;
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const double ad9361_device_t::AD9361_CAL_VALID_WINDOW = 100e6;
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// Max bandwdith is due to filter rolloff in analog filter stage
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const double ad9361_device_t::AD9361_RECOMMENDED_MAX_BANDWIDTH = 56e6;
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/* Program either the RX or TX FIR filter.
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*
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@ -132,8 +132,8 @@ public:
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//Constants
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static const double AD9361_MAX_GAIN;
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static const double AD9361_MAX_CLOCK_RATE;
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static const double AD9361_RECOMMENDED_MAX_CLOCK_RATE;
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static const double AD9361_CAL_VALID_WINDOW;
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static const double AD9361_RECOMMENDED_MAX_BANDWIDTH;
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private: //Methods
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void _program_fir_filter(direction_t direction, int num_taps, boost::uint16_t *coeffs);
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@ -91,12 +91,21 @@ void e300_impl::_update_tick_rate(const double rate)
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}
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}
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#define CHECK_BANDWIDTH(dir) \
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if (rate > _codec_ctrl->get_bw_filter_range(dir).stop()) { \
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UHD_MSG(warning) \
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<< "Selected " << dir << " bandwidth (" << (rate/1e6) << " MHz) exceeds\n" \
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<< "analog frontend filter bandwidth (" << (_codec_ctrl->get_bw_filter_range(dir).stop()/1e6) << " MHz)." \
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<< std::endl; \
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}
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void e300_impl::_update_rx_samp_rate(const size_t dspno, const double rate)
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{
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boost::shared_ptr<sph::recv_packet_streamer> my_streamer =
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boost::dynamic_pointer_cast<sph::recv_packet_streamer>(_radio_perifs[dspno].rx_streamer.lock());
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if (my_streamer)
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my_streamer->set_samp_rate(rate);
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CHECK_BANDWIDTH("Rx");
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}
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void e300_impl::_update_tx_samp_rate(const size_t dspno, const double rate)
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@ -105,6 +114,7 @@ void e300_impl::_update_tx_samp_rate(const size_t dspno, const double rate)
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boost::dynamic_pointer_cast<sph::send_packet_streamer>(_radio_perifs[dspno].tx_streamer.lock());
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if (my_streamer)
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my_streamer->set_samp_rate(rate);
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CHECK_BANDWIDTH("Tx");
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}
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/***********************************************************************
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