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mpm: x4xx: l device only supports "bin" file extension for FPGA

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This commit is contained in:
Jörg Hofrichter 2026-04-22 17:09:56 +02:00 committed by mkoop-ni
parent a58a06f50c
commit 294ced36f6
2 changed files with 11 additions and 2 deletions
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4
mpm/python/usrp_mpm/components.py
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@ -207,9 +207,9 @@ class ZynqComponents:
file_name, file_extension = os.path.splitext(filepath)
# Cut off the period from the file extension
file_extension = file_extension[1:].lower()
if file_extension not in ["bit", "bin"]:
self._log_and_raise(f"Invalid FPGA bitfile: {filepath}")
updc = self._merge_updateable_components()
if file_extension not in updc["fpga"].get("supported_file_extensions", ["bit", "bin"]):
self._log_and_raise(f"Invalid FPGA bitfile: {filepath}")
assert "path" in updc["fpga"]
binfile_path = updc["fpga"]["path"].format(self.device_info.get("product"))

9
mpm/python/usrp_mpm/periph_manager/x4xx.py
View File

@ -215,6 +215,7 @@ class x4xx(ZynqComponents, PeriphManagerBase):
"oldest": (1, 0),
},
},
"supported_file_extensions": ["bit", "bin"],
},
"dts": {
"callback": "update_dts",
@ -518,6 +519,7 @@ class x4xx(ZynqComponents, PeriphManagerBase):
)
self._update_fpga_type()
self._update_fpga_supported_file_extensions()
# Now that we have applied the overlay, we can query the FPGA
# capabilities. This will allow us to figure out a good default MCR,
@ -805,6 +807,13 @@ class x4xx(ZynqComponents, PeriphManagerBase):
self.log.debug("Updating mboard FPGA type info to {}".format(fpga_string))
self.updateable_components["fpga"]["type"] = fpga_string
@no_rpc
def _update_fpga_supported_file_extensions(self):
"""Update the fpga type stored in the updateable components"""
if not self.device_info["customizable_fpga"]:
# only bin files generated by bootgen with authenticated FPGA partition are supported
self.updateable_components["fpga"]["supported_file_extensions"] = ["bin"]
###########################################################################
# GPIO API
###########################################################################