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fpga: lib: Fix pass-through mode in axi_fifo

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A missing "else" after 6ea4e48 was causing two configurations to occur
at the same time for some values of SIZE.

This commit also sets the "space" and "occupied" outputs to 0 when in
pass-through mode.
This commit is contained in:
Wade Fife 2025-04-07 13:55:08 -05:00
parent 7992198889
commit 19b5c85b51
1 changed files with 3 additions and 1 deletions
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fpga/usrp3/lib/fifo/axi_fifo.v
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@ -56,8 +56,10 @@ module axi_fifo #(
assign o_tdata = i_tdata;
assign o_tvalid = i_tvalid;
assign i_tready = o_tready;
assign space = 16'h0;
assign occupied = 16'h0;
end
if (SIZE == 0) begin : gen_fifo_flop
else if (SIZE == 0) begin : gen_fifo_flop
axi_fifo_flop #(
.WIDTH(WIDTH)
) fifo_flop (