From 155dfbf3528b3a3d7c1e155ed9d37b702ddcf751 Mon Sep 17 00:00:00 2001 From: Martin Anderseck Date: Tue, 11 Aug 2026 16:20:47 +0200 Subject: [PATCH] fx3: Upgrade B2xx build This is an upgrade to the latest FX3 SDK (1.3.5) and to the ARM gcc in version 15.3.rel1 for the build of the B2xx firmware and bootloader. All required steps are explained in the updated readme file. Additionally, some bounds checks were added both in the firmware and the bootloader, as well as some more validations and checks to prevent over- and underflows. Newly introduced checks were documented in the code. --- firmware/fx3/README.md | 37 +- firmware/fx3/b200/bootloader/usb_boot.c | 697 ++++---- firmware/fx3/b200/firmware/b200_i2c.c | 38 +- firmware/fx3/b200/firmware/b200_i2c.h | 21 +- firmware/fx3/b200/firmware/b200_main.c | 2005 ++++++++++++----------- firmware/fx3/b200/firmware/makefile | 2 +- firmware/fx3/b200/firmware/syscalls.c | 68 + firmware/fx3/b200/fx3_mem_map.patch | 26 +- 8 files changed, 1552 insertions(+), 1342 deletions(-) create mode 100644 firmware/fx3/b200/firmware/syscalls.c diff --git a/firmware/fx3/README.md b/firmware/fx3/README.md index 49442e368..fd735c378 100644 --- a/firmware/fx3/README.md +++ b/firmware/fx3/README.md @@ -16,10 +16,13 @@ managing the transport from the host to the FPGA by configuring IO and DMA. In order to compile the USRP B200 and B210 bootloader and firmware, you will need the FX3 SDK distributed by Cypress Semiconductor. You can download the -[FX3 SDK from here](https://www.cypress.com/documentation/software-and-drivers/ez-usb-fx3-software-development-kit) +[FX3 SDK from here](https://www.cypress.com/documentation/software-and-drivers/ez-usb-fx3-software-development-kit). +Version 1.3.5 is known to be working. From the SDK, extract the ARM cross-compile toolchain tarball `ARM-GCC.tar.gz` and the FX3 firmware tarball `fx3_firmware_linux.tar.gz`. +Get the latest version of the [GNU Toolchains for ARM from arm.com](https://gitlab.arm.com/tooling/gnu-toolchains-for-arm) +and extract it. Version 15.3.rel1 is known to be working. Set up the appropriate environment variables for the build: @@ -32,15 +35,39 @@ Set up the appropriate environment variables for the build: These should look something like this: ``` - $ export ARMGCC_INSTALL_PATH=/path/to/my/files/arm-2013.11 - $ export ARMGCC_VERSION=4.8.1 + $ export ARMGCC_INSTALL_PATH=/path/to/my/files/arm-gnu-toolchain-15.3.rel1-x86_64-arm-none-eabi + $ export ARMGCC_VERSION=15.3.1 $ export FX3FWROOT=/path/to/my/files/cyfx3sdk ``` +The SDK makefiles invoke `arm-none-eabi-gcc` unqualified and only use +`ARMGCC_INSTALL_PATH` to locate the libraries, so the toolchain must also be on +your `PATH`: + +``` + $ export PATH=$ARMGCC_INSTALL_PATH/bin:$PATH +``` + +Without this, the build either fails with `arm-none-eabi-gcc: No such file or +directory` or, if a different ARM toolchain happens to be installed, silently +compiles with that compiler while linking against the libraries of the toolchain +above. Verify the expected compiler is picked up: + +``` + $ arm-none-eabi-gcc --version +``` + ## Applying the Patch to the Toolchain -Now, you'll need to apply a patch to some files in the Cypress SDK. Apply the -patch `b200/fx3_mem_map.patch` as follows: +Now, you'll need to apply a patch to some files in the Cypress SDK. Before doing +so, ensure all files in the SDK have Unix line endings and are writable for the user: + +``` + $ cd $FX3FWROOT + $ find . -type f -exec dos2unix {} \; -exec chmod u+w {} \; +``` + +Apply the patch `b200/fx3_mem_map.patch` as follows: ``` $ cd uhd.git/firmware/fx3 diff --git a/firmware/fx3/b200/bootloader/usb_boot.c b/firmware/fx3/b200/bootloader/usb_boot.c index ba7eb9dfb..a12d4ee2d 100644 --- a/firmware/fx3/b200/bootloader/usb_boot.c +++ b/firmware/fx3/b200/bootloader/usb_boot.c @@ -5,36 +5,35 @@ // SPDX-License-Identifier: GPL-3.0-or-later // -#include "cyfx3usb.h" #include "cyfx3device.h" -#include "cyfx3utils.h" #include "cyfx3i2c.h" +#include "cyfx3usb.h" +#include "cyfx3utils.h" -#include "common_helpers.h" #include "common_descriptors.h" +#include "common_helpers.h" #include "usb_descriptors.h" -typedef enum -{ - eStall = 0, /* Send STALL */ - eDataIn, /* Data IN Stage */ - eDataOut, /* Data Out Stage */ - eStatus /* Status Stage */ +typedef enum { + eStall = 0, /* Send STALL */ + eDataIn, /* Data IN Stage */ + eDataOut, /* Data Out Stage */ + eStatus /* Status Stage */ } eUsbStage; typedef int (*PFI)(); -#define USB_SETUP_DIR (0x80) /* 0x80 = To Host */ -#define USB_SETUP_MASK (0x60) /* Used to mask off request type */ -#define USB_STANDARD_REQUEST (0x00) /* Standard Request */ -#define USB_VENDOR_REQUEST (0x40) /* Vendor Request */ -#define USB_REQ_MASK (0x3F) /* USB Request mask */ -#define USB_REQ_DEV (0) /* Device Request */ -#define USB_REQ_INTERFACE (1) /* Interface Request */ -#define USB_REQ_ENDPOINT (2) /* Endpoint Request */ -#define USB_SET_INTERFACE (11) -#define USB_SC_SET_SEL (0x30) /* Set system exit latency. */ -#define USB_SC_SET_ISOC_DELAY (0x31) +#define USB_SETUP_DIR (0x80) /* 0x80 = To Host */ +#define USB_SETUP_MASK (0x60) /* Used to mask off request type */ +#define USB_STANDARD_REQUEST (0x00) /* Standard Request */ +#define USB_VENDOR_REQUEST (0x40) /* Vendor Request */ +#define USB_REQ_MASK (0x3F) /* USB Request mask */ +#define USB_REQ_DEV (0) /* Device Request */ +#define USB_REQ_INTERFACE (1) /* Interface Request */ +#define USB_REQ_ENDPOINT (2) /* Endpoint Request */ +#define USB_SET_INTERFACE (11) +#define USB_SC_SET_SEL (0x30) /* Set system exit latency. */ +#define USB_SC_SET_ISOC_DELAY (0x31) #define SELF_POWERED (0x01) #define REMOTE_WAKEUP (0x02) @@ -42,18 +41,18 @@ typedef int (*PFI)(); #define U2_ENABLE (0x08) #define LTM_ENABLE (0x10) -uint8_t glUsbState = 0; -uint8_t gConfig = 0; /* Variable to hold the config info. */ -uint8_t gAltSetting = 0; /* Variable to hold the interface info. */ -uint8_t gUsbDevStatus = 0; +uint8_t glUsbState = 0; +uint8_t gConfig = 0; /* Variable to hold the config info. */ +uint8_t gAltSetting = 0; /* Variable to hold the interface info. */ +uint8_t gUsbDevStatus = 0; uint8_t glCheckForDisconnect = 0; -uint8_t glInCompliance = 0; +uint8_t glInCompliance = 0; /* 4KB of buffer area used for control endpoint transfers. */ -#define gpUSBData (uint8_t*)(0x40077000) -#define USB_DATA_BUF_SIZE (1024*4) +#define gpUSBData (uint8_t*)(0x40077000) +#define USB_DATA_BUF_SIZE (1024 * 4) -CyU3PUsbDescrPtrs *gpUsbDescPtr; /* Pointer to the USB Descriptors */ +CyU3PUsbDescrPtrs* gpUsbDescPtr; /* Pointer to the USB Descriptors */ CyFx3BootUsbEp0Pkt_t gEP0; void myMemCopy(uint8_t* d, uint8_t* s, int32_t cnt) @@ -77,52 +76,51 @@ void myMemSet(uint8_t* d, uint8_t c, int32_t cnt) ***********************************************/ /* Function to handle the GET_STATUS Standard request. */ -int getStatus (void) +int getStatus(void) { uint16_t data = 0; - switch (gEP0.bmReqType & USB_REQ_MASK) - { + switch (gEP0.bmReqType & USB_REQ_MASK) { case USB_REQ_DEV: - if (CyFx3BootUsbGetSpeed () == CY_FX3_BOOT_SUPER_SPEED) - { + if (CyFx3BootUsbGetSpeed() == CY_FX3_BOOT_SUPER_SPEED) { data = (gpUsbDescPtr->usbSSConfigDesc_p[7] & 0x40) ? 1 : 0; data |= gUsbDevStatus; - } - else - { + } else { data = (gpUsbDescPtr->usbHSConfigDesc_p[7] & 0x40) ? 1 : 0; data |= gUsbDevStatus; } break; case USB_REQ_INTERFACE: - if (!gConfig) - { + if (!gConfig) { return eStall; } break; - case USB_REQ_ENDPOINT: - if (CyFx3BootUsbGetEpCfg (gEP0.bIdx0, 0, (CyBool_t *)&data) != 0) - { + case USB_REQ_ENDPOINT: { + CyBool_t isStall = CyFalse; + if (CyFx3BootUsbGetEpCfg(gEP0.bIdx0, 0, &isStall) != 0) { return eStall; } + data = (isStall) ? 1 : 0; break; + } default: return eStall; } - *(uint16_t*)gEP0.pData = data; + /* USB is little endian; gEP0.pData is only byte aligned. */ + gEP0.pData[0] = (uint8_t)(data & 0xFF); + gEP0.pData[1] = (uint8_t)(data >> 8); return eDataIn; } /* Function to handle the GET_DESCRIPTOR Standard request */ -int getDescriptor (void) +int getDescriptor(void) { - uint32_t len = 0; - uint8_t *p = 0; - uint8_t *cfg_p = 0; + uint32_t len = 0; + uint8_t* p = 0; + uint8_t* cfg_p = 0; uint8_t usbSpeed; usbSpeed = CyFx3BootUsbGetSpeed(); @@ -130,176 +128,152 @@ int getDescriptor (void) gpUsbDescPtr->usbHSConfigDesc_p[1] = CY_U3P_USB_CONFIG_DESCR; gpUsbDescPtr->usbFSConfigDesc_p[1] = CY_U3P_USB_CONFIG_DESCR; - if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) - { + if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) { cfg_p = (uint8_t*)gpUsbDescPtr->usbHSConfigDesc_p; - len = ((gpUsbDescPtr->usbHSConfigDesc_p[3] << 8) | gpUsbDescPtr->usbHSConfigDesc_p[2]); - } - else if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) - { + len = ((gpUsbDescPtr->usbHSConfigDesc_p[3] << 8) + | gpUsbDescPtr->usbHSConfigDesc_p[2]); + } else if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) { cfg_p = (uint8_t*)gpUsbDescPtr->usbSSConfigDesc_p; - len = ((gpUsbDescPtr->usbSSConfigDesc_p[3] << 8) | gpUsbDescPtr->usbSSConfigDesc_p[2]); - } - else if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) - { + len = ((gpUsbDescPtr->usbSSConfigDesc_p[3] << 8) + | gpUsbDescPtr->usbSSConfigDesc_p[2]); + } else if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) { cfg_p = (uint8_t*)gpUsbDescPtr->usbFSConfigDesc_p; - len = ((gpUsbDescPtr->usbFSConfigDesc_p[3] << 8) | gpUsbDescPtr->usbFSConfigDesc_p[2]); + len = ((gpUsbDescPtr->usbFSConfigDesc_p[3] << 8) + | gpUsbDescPtr->usbFSConfigDesc_p[2]); } - switch (gEP0.bVal1) - { - case CY_U3P_USB_DEVICE_DESCR: - { - if ((usbSpeed == CY_FX3_BOOT_HIGH_SPEED) || (usbSpeed == CY_FX3_BOOT_FULL_SPEED)) - { - p = (uint8_t*)gpUsbDescPtr->usbDevDesc_p; - len = gpUsbDescPtr->usbDevDesc_p[0]; - } - else if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) - { - p = (uint8_t*)gpUsbDescPtr->usbSSDevDesc_p; - len = gpUsbDescPtr->usbSSDevDesc_p[0]; - } - break; - } - case CY_U3P_BOS_DESCR: - { - p = (uint8_t *)gpUsbDescPtr->usbSSBOSDesc_p; - len = (gpUsbDescPtr->usbSSBOSDesc_p[3] << 8) | gpUsbDescPtr->usbSSBOSDesc_p[2]; - break; - } - case CY_U3P_USB_CONFIG_DESCR: - { - p = cfg_p; - break; - } - case CY_U3P_USB_DEVQUAL_DESCR: - { - if ((usbSpeed == CY_FX3_BOOT_HIGH_SPEED) || (usbSpeed == CY_FX3_BOOT_FULL_SPEED)) - { - p = (uint8_t*)gpUsbDescPtr->usbDevQualDesc_p; - len = gpUsbDescPtr->usbDevQualDesc_p[0]; - break; - } - return eStall; - } - case CY_U3P_USB_STRING_DESCR: - { - /* Ensure that we do not index past the limit of the array. */ - if (gEP0.bVal0 < CY_FX3_USB_MAX_STRING_DESC_INDEX) - { - p = (uint8_t*)gpUsbDescPtr->usbStringDesc_p[gEP0.bVal0]; - if (p != 0) - len = p[0]; - } - else - return eStall; - break; - } - case CY_U3P_USB_OTHERSPEED_DESCR: - { - if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) - { - gpUsbDescPtr->usbFSConfigDesc_p[1] = CY_U3P_USB_OTHERSPEED_DESCR; - p = (uint8_t*)gpUsbDescPtr->usbFSConfigDesc_p; - - len = ((gpUsbDescPtr->usbFSConfigDesc_p[3] < 8) | gpUsbDescPtr->usbFSConfigDesc_p[2]); - - if (len > gEP0.wLen) - { - len = gEP0.wLen; - } - } - else if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) - { - gpUsbDescPtr->usbHSConfigDesc_p[1] = CY_U3P_USB_OTHERSPEED_DESCR; - p = (uint8_t*)gpUsbDescPtr->usbHSConfigDesc_p; - len = ((gpUsbDescPtr->usbHSConfigDesc_p[3] < 8) | gpUsbDescPtr->usbHSConfigDesc_p[2]); - - if (len > gEP0.wLen) - { - len = gEP0.wLen; - } - } + switch (gEP0.bVal1) { + case CY_U3P_USB_DEVICE_DESCR: { + if ((usbSpeed == CY_FX3_BOOT_HIGH_SPEED) + || (usbSpeed == CY_FX3_BOOT_FULL_SPEED)) { + p = (uint8_t*)gpUsbDescPtr->usbDevDesc_p; + len = gpUsbDescPtr->usbDevDesc_p[0]; + } else if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) { + p = (uint8_t*)gpUsbDescPtr->usbSSDevDesc_p; + len = gpUsbDescPtr->usbSSDevDesc_p[0]; } break; - default: - { - return eStall; + } + case CY_U3P_BOS_DESCR: { + p = (uint8_t*)gpUsbDescPtr->usbSSBOSDesc_p; + len = (gpUsbDescPtr->usbSSBOSDesc_p[3] << 8) + | gpUsbDescPtr->usbSSBOSDesc_p[2]; + break; + } + case CY_U3P_USB_CONFIG_DESCR: { + p = cfg_p; + break; + } + case CY_U3P_USB_DEVQUAL_DESCR: { + if ((usbSpeed == CY_FX3_BOOT_HIGH_SPEED) + || (usbSpeed == CY_FX3_BOOT_FULL_SPEED)) { + p = (uint8_t*)gpUsbDescPtr->usbDevQualDesc_p; + len = gpUsbDescPtr->usbDevQualDesc_p[0]; + break; } + return eStall; + } + case CY_U3P_USB_STRING_DESCR: { + /* Ensure that we do not index past the limit of the array. */ + if (gEP0.bVal0 < CY_FX3_USB_MAX_STRING_DESC_INDEX) { + p = (uint8_t*)gpUsbDescPtr->usbStringDesc_p[gEP0.bVal0]; + if (p != 0) + len = p[0]; + } else + return eStall; + break; + } + case CY_U3P_USB_OTHERSPEED_DESCR: { + if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) { + gpUsbDescPtr->usbFSConfigDesc_p[1] = CY_U3P_USB_OTHERSPEED_DESCR; + p = (uint8_t*)gpUsbDescPtr->usbFSConfigDesc_p; + + len = ((gpUsbDescPtr->usbFSConfigDesc_p[3] << 8) + | gpUsbDescPtr->usbFSConfigDesc_p[2]); + + if (len > gEP0.wLen) { + len = gEP0.wLen; + } + } else if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) { + gpUsbDescPtr->usbHSConfigDesc_p[1] = CY_U3P_USB_OTHERSPEED_DESCR; + p = (uint8_t*)gpUsbDescPtr->usbHSConfigDesc_p; + len = ((gpUsbDescPtr->usbHSConfigDesc_p[3] << 8) + | gpUsbDescPtr->usbHSConfigDesc_p[2]); + + if (len > gEP0.wLen) { + len = gEP0.wLen; + } + } + } break; + default: { + return eStall; + } } - if (p != 0) - { - myMemCopy (gpUSBData, p, len); - if (gEP0.wLen > len) - { - gEP0.wLen = len; + if (p != 0) { + /* Never copy or schedule more data than the host requested. */ + if (len > gEP0.wLen) { + len = gEP0.wLen; } + myMemCopy(gpUSBData, p, len); + gEP0.wLen = len; return eDataIn; - } - else + } else /* Stall EP0 if the descriptor sought is not available. */ return eStall; } /* Function to handle the SET_CONFIG Standard request */ -int setConfig (void) +int setConfig(void) { uint8_t usbSpeed = 0; uint32_t retVal = 0; CyFx3BootUsbEpConfig_t epCfg; - if ((gEP0.bVal0 == 0) || (gEP0.bVal0 == 1)) - { + if ((gEP0.bVal0 == 0) || (gEP0.bVal0 == 1)) { glUsbState = gEP0.bVal0; - gConfig = gEP0.bVal0; + gConfig = gEP0.bVal0; /* Get the Bus speed */ usbSpeed = CyFx3BootUsbGetSpeed(); epCfg.pcktSize = 512; /* Based on the Bus Speed configure the endpoint packet size */ - if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) - { + if (usbSpeed == CY_FX3_BOOT_HIGH_SPEED) { epCfg.pcktSize = 512; } - if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) - { + if (usbSpeed == CY_FX3_BOOT_SUPER_SPEED) { epCfg.pcktSize = 1024; } - if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) - { + if (usbSpeed == CY_FX3_BOOT_FULL_SPEED) { epCfg.pcktSize = 64; } /* Producer Endpoint configuration */ - epCfg.enable = 1; - epCfg.epType = CY_FX3_BOOT_USB_EP_BULK; + epCfg.enable = 1; + epCfg.epType = CY_FX3_BOOT_USB_EP_BULK; epCfg.burstLen = 1; - epCfg.streams = 0; - epCfg.isoPkts = 0; + epCfg.streams = 0; + epCfg.isoPkts = 0; /* Configure the Endpoint */ retVal = CyFx3BootUsbSetEpConfig(0x01, &epCfg); - if (retVal != 0) - { + if (retVal != 0) { /* TODO: Error Handling */ return eStall; } /* Consumer Endpoint configuration */ - epCfg.enable = 1; - epCfg.epType = CY_FX3_BOOT_USB_EP_BULK; + epCfg.enable = 1; + epCfg.epType = CY_FX3_BOOT_USB_EP_BULK; epCfg.burstLen = 1; - epCfg.streams = 0; - epCfg.isoPkts = 0; + epCfg.streams = 0; + epCfg.isoPkts = 0; /* Configure the Endpoint */ - retVal = CyFx3BootUsbSetEpConfig (0x81, &epCfg); - if (retVal != 0) - { + retVal = CyFx3BootUsbSetEpConfig(0x81, &epCfg); + if (retVal != 0) { /* TODO: Error Handling */ return eStall; } @@ -311,71 +285,69 @@ int setConfig (void) } /* Function to handle the GET_INTERFACE Standard request */ -int getInterface (void) +int getInterface(void) { - if (gConfig == 0) - { + if (gConfig == 0) { return eStall; } - gEP0.pData = (uint8_t *)&gAltSetting; + gEP0.pData = (uint8_t*)&gAltSetting; return eDataIn; } /* Function to handle the SET_INTERFACE Standard request */ -int setInterface (void) +int setInterface(void) { + /* This configuration has only interface 0 and alternate setting 0. */ + if ((gConfig == 0) || (gEP0.bIdx0 != 0) || (gEP0.bIdx1 != 0) || (gEP0.bVal0 != 0) + || (gEP0.bVal1 != 0)) { + return eStall; + } + gAltSetting = gEP0.bVal0; return eStatus; } /* This function returns stall for not supported requests. */ -int stall (void) +int stall(void) { return eStall; } /* Function to handle the SET_ADDRESS Standard request. */ -int setAddress (void) +int setAddress(void) { return eStatus; } /* Function to handle the CLEAR_FEATURE Standard request. */ -int clearFeature (void) +int clearFeature(void) { /* All of the actual handling for the CLEAR_FEATURE request is done in the API. We only need to update the device status flags here. */ - if (CyFx3BootUsbSetClrFeature (0, (CyBool_t)glUsbState, &gEP0) != 0) - { + if (CyFx3BootUsbSetClrFeature(0, (CyBool_t)glUsbState, &gEP0) != 0) { return eStall; } - if (gEP0.bmReqType == USB_REQ_DEV) - { + if (gEP0.bmReqType == USB_REQ_DEV) { /* Update the device status flags as required. */ - if (CyFx3BootUsbGetSpeed () == CY_FX3_BOOT_SUPER_SPEED) - { - switch (gEP0.bVal0) - { - case 48: - gUsbDevStatus &= ~U1_ENABLE; - break; - case 49: - gUsbDevStatus &= ~U2_ENABLE; - break; - case 50: - gUsbDevStatus &= ~LTM_ENABLE; - break; - default: - break; + if (CyFx3BootUsbGetSpeed() == CY_FX3_BOOT_SUPER_SPEED) { + switch (gEP0.bVal0) { + case 48: + gUsbDevStatus &= ~U1_ENABLE; + break; + case 49: + gUsbDevStatus &= ~U2_ENABLE; + break; + case 50: + gUsbDevStatus &= ~LTM_ENABLE; + break; + default: + break; } - } - else - { - if (gEP0.bVal0 == 1) - { + } else { + if (gEP0.bVal0 == 1) { gUsbDevStatus &= ~REMOTE_WAKEUP; } } @@ -385,40 +357,33 @@ int clearFeature (void) } /* Function to handle the SET_FEATURE Standard request. */ -int setFeature (void) +int setFeature(void) { /* All of the actual handling for the SET_FEATURE command is done in the API. * We only need to update the device status flags here. */ - if (CyFx3BootUsbSetClrFeature (1, (CyBool_t)glUsbState, &gEP0) != 0) - { + if (CyFx3BootUsbSetClrFeature(1, (CyBool_t)glUsbState, &gEP0) != 0) { return eStall; } - if (gEP0.bmReqType == USB_REQ_DEV) - { + if (gEP0.bmReqType == USB_REQ_DEV) { /* Update the device status flags as required. */ - if (CyFx3BootUsbGetSpeed () == CY_FX3_BOOT_SUPER_SPEED) - { - switch (gEP0.bVal0) - { - case 48: - gUsbDevStatus |= U1_ENABLE; - break; - case 49: - gUsbDevStatus |= U2_ENABLE; - break; - case 50: - gUsbDevStatus |= LTM_ENABLE; - break; - default: - break; + if (CyFx3BootUsbGetSpeed() == CY_FX3_BOOT_SUPER_SPEED) { + switch (gEP0.bVal0) { + case 48: + gUsbDevStatus |= U1_ENABLE; + break; + case 49: + gUsbDevStatus |= U2_ENABLE; + break; + case 50: + gUsbDevStatus |= LTM_ENABLE; + break; + default: + break; } - } - else - { - if (gEP0.bVal0 == 1) - { + } else { + if (gEP0.bVal0 == 1) { gUsbDevStatus |= REMOTE_WAKEUP; } } @@ -427,26 +392,25 @@ int setFeature (void) } /* Function to handle the GET_CONFIG Standard request. */ -int getConfig (void) +int getConfig(void) { - gEP0.pData = (uint8_t *)&gConfig; + gEP0.pData = (uint8_t*)&gConfig; return eDataIn; } -const PFI chapter9_cmds[] = -{ - getStatus, /* USB_GET_STATUS 0 */ - clearFeature, /* USB_CLEAR_FEATURE 1 */ - stall, /* Reserved 2 */ - setFeature, /* USB_SET_FEATURE 3 */ - stall, /* Reserved 4 */ - setAddress, /* USB_SET_ADDRESS 5 */ - getDescriptor, /* USB_GET_DESCRIPTOR 6 */ - stall, /* USB_SET_DESCRIPTOR 7 */ - getConfig, /* USB_GET_CONFIGURATION 8 */ - setConfig, /* USB_SET_CONFIGURATION 9 */ - getInterface, /* USB_GET_INTERFACE 10 */ - setInterface, /* USB_SET_INTERFACE 11 */ +const PFI chapter9_cmds[] = { + getStatus, /* USB_GET_STATUS 0 */ + clearFeature, /* USB_CLEAR_FEATURE 1 */ + stall, /* Reserved 2 */ + setFeature, /* USB_SET_FEATURE 3 */ + stall, /* Reserved 4 */ + setAddress, /* USB_SET_ADDRESS 5 */ + getDescriptor, /* USB_GET_DESCRIPTOR 6 */ + stall, /* USB_SET_DESCRIPTOR 7 */ + getConfig, /* USB_GET_CONFIGURATION 8 */ + setConfig, /* USB_SET_CONFIGURATION 9 */ + getInterface, /* USB_GET_INTERFACE 10 */ + setInterface, /* USB_SET_INTERFACE 11 */ }; /* This function validates the addresses being written to/read from @@ -454,23 +418,21 @@ const PFI chapter9_cmds[] = 0 - Address is valid -1 - Address is not valid */ -int checkAddress (uint32_t address, uint32_t len) +int checkAddress(uint32_t address, uint32_t len) { - if (address & 3) - { + if (address & 3) { /* expect long word boundary */ return -1; } - len += address; - - if ((address >= CY_FX3_BOOT_SYSMEM_BASE1) && (len <= CY_FX3_BOOT_SYSMEM_END)) - { + /* Use subtraction for the upper bound so address + len cannot wrap. */ + if ((address >= CY_FX3_BOOT_SYSMEM_BASE1) && (address <= CY_FX3_BOOT_SYSMEM_END) + && (len <= (CY_FX3_BOOT_SYSMEM_END - address))) { return 0; } - if (len <= CY_FX3_BOOT_ITCM_END) - { + /* The same overflow-safe check applies to the instruction TCM range. */ + if ((address <= CY_FX3_BOOT_ITCM_END) && (len <= (CY_FX3_BOOT_ITCM_END - address))) { return 0; } @@ -478,103 +440,97 @@ int checkAddress (uint32_t address, uint32_t len) } /* Function to handle the vendor commands. */ -void vendorCmdHandler (void) +void vendorCmdHandler(void) { int stage; int status; - uint32_t address = ((gEP0.bIdx1 << 24) | (gEP0.bIdx0 << 16) | (gEP0.bVal1 << 8) | (gEP0.bVal0)); + uint32_t address = + ((gEP0.bIdx1 << 24) | (gEP0.bIdx0 << 16) | (gEP0.bVal1 << 8) | (gEP0.bVal0)); uint16_t len = gEP0.wLen; uint16_t bReq = gEP0.bReq; uint16_t dir = gEP0.bmReqType & USB_SETUP_DIR; - if (len > USB_DATA_BUF_SIZE) - { - CyFx3BootUsbStall (0, CyTrue, CyFalse); + if (len > USB_DATA_BUF_SIZE) { + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } - if (dir) - { + if (dir) { stage = eDataIn; - } - else - { + } else { stage = eDataOut; } /* Vendor Command 0xA0 handling */ - if (bReq == 0xA0) - { - /* Note: This is a command issued by the CyControl Application to detect the legacy products. - As we are an FX3 device we stall the endpoint to indicate that this is not a legacy device. - */ - if (address == 0xE600) - { - /* Stall the Endpoint */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); - return; - } + if (bReq == 0xA0) { + /* Note: This is a command issued by the CyControl Application to detect the + legacy products. As we are an FX3 device we stall the endpoint to indicate that + this is not a legacy device. + */ + if (address == 0xE600) { + /* Stall the Endpoint */ + CyFx3BootUsbStall(0, CyTrue, CyFalse); + return; + } - status = checkAddress (address, len); - if (len == 0) - { + /* Validate the complete requested range before reading, writing, or jumping. */ + status = checkAddress(address, len); + if ((len == 0) && (status == 0)) { /* Mask the USB Interrupts and Disconnect the USB Phy. */ - CyFx3BootUsbConnect (CyFalse, CyTrue); + CyFx3BootUsbConnect(CyFalse, CyTrue); /* Transfer to Program Entry */ - CyFx3BootJumpToProgramEntry (address); + CyFx3BootJumpToProgramEntry(address); return; } - if (status < 0) - { + if (status < 0) { /* Stall the endpoint */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } - /* Validate the SYSMEM address being accessed */ - if ((address >= CY_FX3_BOOT_SYSMEM_BASE1) && (address < CY_FX3_BOOT_SYSMEM_END)) - { + /* DMA can use system memory directly; ITCM transfers use gpUSBData below. */ + if ((address >= CY_FX3_BOOT_SYSMEM_BASE1) && (address < CY_FX3_BOOT_SYSMEM_END)) { gEP0.pData = (uint8_t*)address; } - CyFx3BootUsbAckSetup (); + CyFx3BootUsbAckSetup(); - if (eDataIn == stage) - { - if ((address + gEP0.wLen) <= CY_FX3_BOOT_ITCM_END) - { - myMemCopy(gEP0.pData, (uint8_t *)address , len); + if (eDataIn == stage) { + if (address < CY_FX3_BOOT_SYSMEM_BASE1) { + myMemCopy(gEP0.pData, (uint8_t*)address, len); } - status = CyFx3BootUsbDmaXferData (0x80, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); - if (status != CY_FX3_BOOT_SUCCESS) - { + status = CyFx3BootUsbDmaXferData( + 0x80, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); + if (status != CY_FX3_BOOT_SUCCESS) { /* USB DMA Transfer failed. Stall the Endpoint. */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } - } - else if (stage == eDataOut) - { - status = CyFx3BootUsbDmaXferData (0x00, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); - if (status != CY_FX3_BOOT_SUCCESS) - { + } else if (stage == eDataOut) { + status = CyFx3BootUsbDmaXferData( + 0x00, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); + if (status != CY_FX3_BOOT_SUCCESS) { /* USB DMA Transfer failed. Stall the Endpoint. */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } - /* Validate ITCM Memory */ - if ((address + gEP0.wLen) <= CY_FX3_BOOT_ITCM_END) - { - /* Avoid writing to the interrupt table. */ - if (address < 0xFF) { - gEP0.pData += 0xFF-address; - gEP0.wLen -= 0xFF-address; - address = 0xFF; + /* Copy the staged transfer into ITCM only after the range was validated. */ + if (address < CY_FX3_BOOT_SYSMEM_BASE1) { + /* Do not overwrite the interrupt table at the start of ITCM. */ + if (address < 0x100) { + uint32_t skip = 0x100 - address; + /* A short request may be entirely inside the protected region. */ + if (gEP0.wLen <= skip) { + return; + } + gEP0.pData += skip; + gEP0.wLen -= skip; + address = 0x100; } - myMemCopy((uint8_t *)address, gEP0.pData, gEP0.wLen); + myMemCopy((uint8_t*)address, gEP0.pData, gEP0.wLen); } } return; @@ -583,68 +539,62 @@ void vendorCmdHandler (void) /* Version request */ if (dir && bReq == 0xB8) { uint8_t version_info[] = {1, 21, 0, 0, 0, 0}; + uint16_t version_len = sizeof(version_info); - CyFx3BootUsbAckSetup (); - status = CyFx3BootUsbDmaXferData (0x80, (uint32_t)version_info, - sizeof(version_info), CY_FX3_BOOT_WAIT_FOREVER); + /* USB wLength is the host's maximum; do not send a longer response. */ + if (version_len > gEP0.wLen) { + version_len = gEP0.wLen; + } + + CyFx3BootUsbAckSetup(); + status = CyFx3BootUsbDmaXferData( + 0x80, (uint32_t)version_info, version_len, CY_FX3_BOOT_WAIT_FOREVER); if (status != CY_FX3_BOOT_SUCCESS) { /* USB DMA Transfer failed. Stall the Endpoint. */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); } return; } /* Stall the Endpoint */ - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } /* Setup Data handler */ -void setupDataHandler (uint32_t setupDat0, uint32_t setupDat1) +void setupDataHandler(uint32_t setupDat0, uint32_t setupDat1) { - uint32_t *p; + uint32_t* p; int status = eStall; - p = (uint32_t*)&gEP0; + p = (uint32_t*)&gEP0; p[0] = setupDat0; p[1] = setupDat1; gEP0.pData = gpUSBData; - switch (gEP0.bmReqType & USB_SETUP_MASK) - { + switch (gEP0.bmReqType & USB_SETUP_MASK) { case USB_STANDARD_REQUEST: - if (gEP0.bReq <= USB_SET_INTERFACE) - { + if (gEP0.bReq <= USB_SET_INTERFACE) { status = (*chapter9_cmds[gEP0.bReq])(); - } - else - { - if (gEP0.bReq == USB_SC_SET_SEL) - { - if ((CyFx3BootUsbGetSpeed () == CY_FX3_BOOT_SUPER_SPEED) && (gEP0.bIdx0 == 0) && - (gEP0.bIdx1 == 0) && (gEP0.bVal0 == 0) && (gEP0.bVal1 == 0) && (gEP0.wLen == 6)) - { + } else { + if (gEP0.bReq == USB_SC_SET_SEL) { + if ((CyFx3BootUsbGetSpeed() == CY_FX3_BOOT_SUPER_SPEED) + && (gEP0.bIdx0 == 0) && (gEP0.bIdx1 == 0) && (gEP0.bVal0 == 0) + && (gEP0.bVal1 == 0) && (gEP0.wLen == 6)) { gEP0.wLen = 32; - status = eDataOut; - } - else - { + status = eDataOut; + } else { status = eStall; } - } - else if (gEP0.bReq == USB_SC_SET_ISOC_DELAY) - { + } else if (gEP0.bReq == USB_SC_SET_ISOC_DELAY) { status = eStatus; - if ((CyFx3BootUsbGetSpeed () != CY_FX3_BOOT_SUPER_SPEED) || (gEP0.bIdx0 != 0) || - (gEP0.bIdx1 != 0) || (gEP0.wLen != 0)) - { + if ((CyFx3BootUsbGetSpeed() != CY_FX3_BOOT_SUPER_SPEED) + || (gEP0.bIdx0 != 0) || (gEP0.bIdx1 != 0) || (gEP0.wLen != 0)) { status = eStall; } - } - else - { + } else { status = eStall; } } @@ -655,29 +605,27 @@ void setupDataHandler (uint32_t setupDat0, uint32_t setupDat1) return; } - switch (status) - { + switch (status) { case eDataIn: - CyFx3BootUsbAckSetup (); - status = CyFx3BootUsbDmaXferData (0x80, (uint32_t)gEP0.pData, gEP0.wLen, 1000); - if (status != CY_FX3_BOOT_SUCCESS) - { - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbAckSetup(); + status = CyFx3BootUsbDmaXferData(0x80, (uint32_t)gEP0.pData, gEP0.wLen, 1000); + if (status != CY_FX3_BOOT_SUCCESS) { + CyFx3BootUsbStall(0, CyTrue, CyFalse); } break; case eDataOut: - CyFx3BootUsbAckSetup (); - status = CyFx3BootUsbDmaXferData (0x00, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); - if (status != CY_FX3_BOOT_SUCCESS) - { - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbAckSetup(); + status = CyFx3BootUsbDmaXferData( + 0x00, (uint32_t)gEP0.pData, gEP0.wLen, CY_FX3_BOOT_WAIT_FOREVER); + if (status != CY_FX3_BOOT_SUCCESS) { + CyFx3BootUsbStall(0, CyTrue, CyFalse); } break; case eStatus: - CyFx3BootUsbAckSetup (); + CyFx3BootUsbAckSetup(); break; default: - CyFx3BootUsbStall (0, CyTrue, CyFalse); + CyFx3BootUsbStall(0, CyTrue, CyFalse); return; } @@ -687,31 +635,26 @@ void setupDataHandler (uint32_t setupDat0, uint32_t setupDat1) /* USB Event Handler. This function is invoked from the USB ISR and as such MUST not be blocked. */ -void usbEventCallback (CyFx3BootUsbEventType_t event) +void usbEventCallback(CyFx3BootUsbEventType_t event) { - if (event == CY_FX3_BOOT_USB_RESET) - { - gConfig = 0; - gAltSetting = 0; - gUsbDevStatus = 0; - glUsbState = 0; - glInCompliance = 0; + if (event == CY_FX3_BOOT_USB_RESET) { + gConfig = 0; + gAltSetting = 0; + gUsbDevStatus = 0; + glUsbState = 0; + glInCompliance = 0; } - if ((event == CY_FX3_BOOT_USB_CONNECT) || - (event == CY_FX3_BOOT_USB_DISCONNECT)) - { + if ((event == CY_FX3_BOOT_USB_CONNECT) || (event == CY_FX3_BOOT_USB_DISCONNECT)) { glUsbState = 0; gUsbDevStatus = 0; } - if (event == CY_FX3_BOOT_USB_IN_SS_DISCONNECT) - { + if (event == CY_FX3_BOOT_USB_IN_SS_DISCONNECT) { glCheckForDisconnect = CyTrue; } - if (event == CY_FX3_BOOT_USB_COMPLIANCE) - { + if (event == CY_FX3_BOOT_USB_COMPLIANCE) { glInCompliance = CyTrue; } @@ -743,21 +686,20 @@ void usbBoot() glInCompliance = 0; /* Init */ - CyFx3BootUsbStart (CyFalse, usbEventCallback); + CyFx3BootUsbStart(CyFalse, usbEventCallback); /* Run USB circuitry off of host power, not internal power. */ - CyFx3BootUsbVBattEnable (CyFalse); + CyFx3BootUsbVBattEnable(CyFalse); /* Register callbacks */ - CyFx3BootRegisterSetupCallback (setupDataHandler); + CyFx3BootRegisterSetupCallback(setupDataHandler); /* Enable I2C for EEPROM access */ CyFx3BootI2cInit(); - CyFx3BootI2cConfig_t i2cCfg = { - .bitRate = 100000, - .isDma = CyFalse, - .busTimeout = 0xFFFFFFFF, - .dmaTimeout = 0xFFFF}; + CyFx3BootI2cConfig_t i2cCfg = {.bitRate = 100000, + .isDma = CyFalse, + .busTimeout = 0xFFFFFFFF, + .dmaTimeout = 0xFFFF}; CyFx3BootI2cSetConfig(&i2cCfg); /* Retrieve VID and PID from EEPROM */ @@ -802,6 +744,5 @@ void usbBoot() gpUsbDescPtr = CyFx3BootUsbGetDesc(); /* Connect! */ - CyFx3BootUsbConnect (CyTrue, CyTrue); + CyFx3BootUsbConnect(CyTrue, CyTrue); } - diff --git a/firmware/fx3/b200/firmware/b200_i2c.c b/firmware/fx3/b200/firmware/b200_i2c.c index c6fa67c77..b11871815 100644 --- a/firmware/fx3/b200/firmware/b200_i2c.c +++ b/firmware/fx3/b200/firmware/b200_i2c.c @@ -6,43 +6,45 @@ #include "cyu3i2c.h" +static uint16_t glI2cPageSize = 0x40; /* I2C Page size to be used for transfers. */ + /* I2c initialization for EEPROM programming. */ -void CyFxI2cInit (uint16_t pageLen) { +void CyFxI2cInit(uint16_t pageLen) +{ CyU3PI2cConfig_t i2cConfig; /* Initialize and configure the I2C master module. */ - CyU3PI2cInit (); + CyU3PI2cInit(); /* Start the I2C master block. The bit rate is set at 100KHz. * The data transfer is done via DMA. */ - CyU3PMemSet ((uint8_t *)&i2cConfig, 0, sizeof(i2cConfig)); + CyU3PMemSet((uint8_t*)&i2cConfig, 0, sizeof(i2cConfig)); i2cConfig.bitRate = CY_FX_USBI2C_I2C_BITRATE; i2cConfig.busTimeout = 0xFFFFFFFF; i2cConfig.dmaTimeout = 0xFFFF; i2cConfig.isDma = CyFalse; - CyU3PI2cSetConfig (&i2cConfig, NULL); + CyU3PI2cSetConfig(&i2cConfig, NULL); glI2cPageSize = pageLen; } /* I2C read / write for programmer application. */ -void CyFxUsbI2cTransfer ( - uint16_t byteAddress, - uint8_t devAddr, - uint16_t byteCount, - uint8_t *buffer, - CyBool_t isRead) +void CyFxUsbI2cTransfer(uint16_t byteAddress, + uint8_t devAddr, + uint16_t byteCount, + uint8_t* buffer, + CyBool_t isRead) { CyU3PI2cPreamble_t preamble; uint16_t pageCount = (byteCount / glI2cPageSize); - uint16_t resCount = glI2cPageSize; + uint16_t resCount = glI2cPageSize; if (byteCount == 0) { return; } if ((byteCount % glI2cPageSize) != 0) { - pageCount ++; + pageCount++; resCount = byteCount % glI2cPageSize; } @@ -56,7 +58,8 @@ void CyFxUsbI2cTransfer ( preamble.buffer[3] = (devAddr | 0x01); preamble.ctrlMask = 0x0004; - CyU3PI2cReceiveBytes (&preamble, buffer, (pageCount == 1) ? resCount : glI2cPageSize, 0); + CyU3PI2cReceiveBytes( + &preamble, buffer, (pageCount == 1) ? resCount : glI2cPageSize, 0); } else { /* Write. Update the preamble information. */ preamble.length = 3; @@ -65,18 +68,19 @@ void CyFxUsbI2cTransfer ( preamble.buffer[2] = (uint8_t)(byteAddress & 0xFF); preamble.ctrlMask = 0x0000; - CyU3PI2cTransmitBytes (&preamble, buffer, (pageCount == 1) ? resCount : glI2cPageSize, 0); + CyU3PI2cTransmitBytes( + &preamble, buffer, (pageCount == 1) ? resCount : glI2cPageSize, 0); /* Wait for the write to complete. */ preamble.length = 1; CyU3PI2cWaitForAck(&preamble, 200); } /* An additional delay seems to be required after receiving an ACK. */ - CyU3PThreadSleep (1); + CyU3PThreadSleep(1); /* Update the parameters */ - byteAddress += glI2cPageSize; + byteAddress += glI2cPageSize; buffer += glI2cPageSize; - pageCount --; + pageCount--; } } diff --git a/firmware/fx3/b200/firmware/b200_i2c.h b/firmware/fx3/b200/firmware/b200_i2c.h index c5c781946..107603746 100644 --- a/firmware/fx3/b200/firmware/b200_i2c.h +++ b/firmware/fx3/b200/firmware/b200_i2c.h @@ -7,33 +7,34 @@ #include "cyu3externcstart.h" -#include "cyu3usbconst.h" #include "cyu3types.h" +#include "cyu3usbconst.h" /* Following two definitions made in b200_main.h for consistency. */ /* define B200_VREQ_EEPROM_WRITE (uint8_t)(0xBA) */ /* define B200_VREQ_EEPROM_READ (uint8_t)(0xBB) */ -static uint16_t glI2cPageSize = 0x40; /* I2C Page size to be used for transfers. */ - /* This application uses EEPROM as the slave I2C device. The I2C EEPROM * part number used is 24LC256. The capacity of the EEPROM is 256K bits */ -#define CY_FX_USBI2C_I2C_MAX_CAPACITY (32 * 1024) /* Capacity in bytes */ +#define CY_FX_USBI2C_I2C_MAX_CAPACITY (32 * 1024) /* Capacity in bytes */ /* The following constant is defined based on the page size that the I2C * device support. 24LC256 support 64 byte page write access. */ -#define CY_FX_USBI2C_I2C_PAGE_SIZE (64) +#define CY_FX_USBI2C_I2C_PAGE_SIZE (64) /* I2C Data rate */ -#define CY_FX_USBI2C_I2C_BITRATE (100000) +#define CY_FX_USBI2C_I2C_BITRATE (100000) /* Give a timeout value of 5s for any programming. */ -#define CY_FX_USB_I2C_TIMEOUT (5000) +#define CY_FX_USB_I2C_TIMEOUT (5000) /* Function forward-declerations. */ -void CyFxI2cInit (uint16_t pageLen); -void CyFxUsbI2cTransfer (uint16_t byteAddress, uint8_t devAddr, - uint16_t byteCount, uint8_t *buffer, CyBool_t isRead); +void CyFxI2cInit(uint16_t pageLen); +void CyFxUsbI2cTransfer(uint16_t byteAddress, + uint8_t devAddr, + uint16_t byteCount, + uint8_t* buffer, + CyBool_t isRead); #include "cyu3externcend.h" diff --git a/firmware/fx3/b200/firmware/b200_main.c b/firmware/fx3/b200/firmware/b200_main.c index 26507dda7..89e65c876 100644 --- a/firmware/fx3/b200/firmware/b200_main.c +++ b/firmware/fx3/b200/firmware/b200_main.c @@ -12,129 +12,144 @@ #include #include +#include // caddr_t, uint #include "b200_const.h" #include "b200_gpifconfig.h" #include "b200_i2c.h" -#include "common_helpers.h" -#include "common_descriptors.h" #include "b200_usb_descriptors.h" +#include "common_descriptors.h" +#include "common_helpers.h" +#include "cyfxversion.h" #include "cyu3dma.h" #include "cyu3error.h" #include "cyu3gpif.h" #include "cyu3gpio.h" -#include "cyu3spi.h" #include "cyu3os.h" #include "cyu3pib.h" +#include "cyu3spi.h" #include "cyu3system.h" #include "cyu3usb.h" #include "cyu3utils.h" -#include "cyfxversion.h" #include "pib_regs.h" -#define STATIC_SAVER static // Save stack space for variables in a non-re-entrant function (e.g. USB setup callback) +#define STATIC_SAVER \ + static // Save stack space for variables in a non-re-entrant function (e.g. USB setup + // callback) /* - * WARNING: Before you enable any of the features below, please read the comments on the same line for that feature! - * Indented features must have the parent feature enabled as well. + * WARNING: Before you enable any of the features below, please read the comments on the + * same line for that feature! Indented features must have the parent feature enabled as + * well. */ -#define HAS_HEAP // This requires memory to be set aside for the heap (e.g. required for printing floating-point numbers). You can apply the accompanying patch ('fx3_mem_map.patch') to fx3.ld & cyfxtx.c to create one. -#define ENABLE_MSG // This will cause the compiled code to exceed the default text memory area (SYS_MEM). You can apply the accompanying patch ('fx3_mem_map.patch') to fx3.ld & cyfxtx.c to resize the memory map so it will fit. -#define ENABLE_MANUAL_DMA_XFER // Allows us to set it from the host (using the side channel util), doesn't auto-enable it -//#define ENABLE_P2U_SUSP_EOP -#define ENABLE_MANUAL_DMA_XFER_FROM_HOST -#define ENABLE_MANUAL_DMA_XFER_TO_HOST -//#define ENABLE_DMA_BUFFER_PACKET_DEBUG -#define ENABLE_FPGA_SB // Be careful: this will add an ever-so-slight delay to some operations (e.g. AD3961 tune) +#define HAS_HEAP // This requires memory to be set aside for the heap (e.g. required for + // printing floating-point numbers). You can apply the accompanying patch + // ('fx3_mem_map.patch') to fx3.ld & cyfxtx.c to create one. +#define ENABLE_MSG // This will cause the compiled code to exceed the default text memory + // area (SYS_MEM). You can apply the accompanying patch + // ('fx3_mem_map.patch') to fx3.ld & cyfxtx.c to resize the memory map + // so it will fit. +#define ENABLE_MANUAL_DMA_XFER // Allows us to set it from the host (using the side + // channel util), doesn't auto-enable it +// #define ENABLE_P2U_SUSP_EOP +#define ENABLE_MANUAL_DMA_XFER_FROM_HOST +#define ENABLE_MANUAL_DMA_XFER_TO_HOST +// #define ENABLE_DMA_BUFFER_PACKET_DEBUG +#define ENABLE_FPGA_SB // Be careful: this will add an ever-so-slight delay to some + // operations (e.g. AD3961 tune) #define ENABLE_RE_ENUM_THREAD #define ENABLE_USB_EVENT_LOGGING -//#define PREVENT_LOW_POWER_MODE -/*#define ENABLE_INIT_B_WORKAROUND // This should only be enabled if you have a board where the FPGA INIT_B line is broken, but the FPGA is known to work*/ -/*#define ENABLE_DONE_WORKAROUND // This should only be enabled if you have a board where the FPGA DONE line is broken, but the FPGA is known to work*/ +// #define PREVENT_LOW_POWER_MODE +/*#define ENABLE_INIT_B_WORKAROUND // This should only be enabled if you have a board + * where the FPGA INIT_B line is broken, but the FPGA is known to work*/ +/*#define ENABLE_DONE_WORKAROUND // This should only be enabled if you have a board + * where the FPGA DONE line is broken, but the FPGA is known to work*/ -#define WATCHDOG_TIMEOUT 1500 -#define CHECK_POWER_STATE_SLEEP_TIME 500 // Should be less than WATCHDOG_TIMEOUT +#define WATCHDOG_TIMEOUT 1500 +#define CHECK_POWER_STATE_SLEEP_TIME 500 // Should be less than WATCHDOG_TIMEOUT -#define FPGA_PROGRAMMING_POLL_SLEEP 10 // ticks +#define FPGA_PROGRAMMING_POLL_SLEEP 10 // ticks #define FPGA_PROGRAMMING_BITSTREAM_START_POLL_COUNT 250 // ~2.5 secs #define FPGA_PROGRAMMING_INITB_POLL_COUNT 100 // ~1 sec -#define FPGA_PROGRAMMING_DONE_POLL_COUNT 250 // ~2.5 secs // This is the interval *after* no FPGA programming activity has been detected +#define FPGA_PROGRAMMING_DONE_POLL_COUNT \ + 250 // ~2.5 secs // This is the interval *after* no FPGA programming activity has + // been detected -#define FPGA_RESET_SETTLING_TIME (1*10) // ~10ms (for SB to initialise) +#define FPGA_RESET_SETTLING_TIME (1 * 10) // ~10ms (for SB to initialise) -#define RE_ENUM_THREAD_SLEEP_TIME 100 -#define KEEP_ALIVE_LOOP_COUNT 200 +#define RE_ENUM_THREAD_SLEEP_TIME 100 +#define KEEP_ALIVE_LOOP_COUNT 200 #pragma message "----------------------" #ifdef ENABLE_MSG -#pragma message "msg enabled" +# pragma message "msg enabled" #else -#pragma message "msg disabled" +# pragma message "msg disabled" #endif // ENABLE_MSG #ifdef ENABLE_MANUAL_DMA_XFER -#pragma message "Manual DMA transfers" +# pragma message "Manual DMA transfers" -#ifdef ENABLE_MANUAL_DMA_XFER_FROM_HOST -#pragma message " -> From host" -#endif // ENABLE_MANUAL_DMA_XFER_FROM_HOST +# ifdef ENABLE_MANUAL_DMA_XFER_FROM_HOST +# pragma message " -> From host" +# endif // ENABLE_MANUAL_DMA_XFER_FROM_HOST -#ifdef ENABLE_MANUAL_DMA_XFER_TO_HOST -#pragma message " <- To host" -#endif // ENABLE_MANUAL_DMA_XFER_TO_HOST +# ifdef ENABLE_MANUAL_DMA_XFER_TO_HOST +# pragma message " <- To host" +# endif // ENABLE_MANUAL_DMA_XFER_TO_HOST -#ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG -#pragma message " Packet debugging enabled" -#endif // ENABLE_DMA_BUFFER_PACKET_DEBUG +# ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG +# pragma message " Packet debugging enabled" +# endif // ENABLE_DMA_BUFFER_PACKET_DEBUG #else -#pragma message "Auto DMA transfers" +# pragma message "Auto DMA transfers" #endif // ENABLE_MANUAL_DMA_XFER #ifdef ENABLE_FPGA_SB -#pragma message "FPGA Settings Bus enabled" +# pragma message "FPGA Settings Bus enabled" #else -#pragma message "FPGA Settings Bus disabled" +# pragma message "FPGA Settings Bus disabled" #endif // ENABLE_FPGA_SB #ifdef ENABLE_RE_ENUM_THREAD -#pragma message "Re-enumeration & statistics thread enabled" +# pragma message "Re-enumeration & statistics thread enabled" #else -#pragma message "Re-enumeration & statistics thread disabled" +# pragma message "Re-enumeration & statistics thread disabled" #endif // ENABLE_RE_ENUM_THREAD #ifdef ENABLE_USB_EVENT_LOGGING -#pragma message "USB event logging enabled" +# pragma message "USB event logging enabled" #else -#pragma message "USB event logging disabled" +# pragma message "USB event logging disabled" #endif // ENABLE_USB_EVENT_LOGGING #ifdef PREVENT_LOW_POWER_MODE -#pragma message "Preventing Low Power Mode" +# pragma message "Preventing Low Power Mode" #else -#pragma message "Allowing Low Power Mode" +# pragma message "Allowing Low Power Mode" #endif // PREVENT_LOW_POWER_MODE #ifdef HAS_HEAP -#pragma message "Heap enabled" +# pragma message "Heap enabled" #else -#pragma message "Heap disabled" +# pragma message "Heap disabled" #endif // HAS_HEAP #ifdef ENABLE_INIT_B_WORKAROUND -#pragma message "INIT_B workaround enabled" +# pragma message "INIT_B workaround enabled" #else -#pragma message "INIT_B workaround disabled" +# pragma message "INIT_B workaround disabled" #endif // ENABLE_INIT_B_WORKAROUND #ifdef ENABLE_DONE_WORKAROUND -#pragma message "DONE workaround enabled" +# pragma message "DONE workaround enabled" #else -#pragma message "DONE workaround disabled" +# pragma message "DONE workaround disabled" #endif // ENABLE_DONE_WORKAROUND #pragma message "----------------------" @@ -154,24 +169,25 @@ static CyU3PThread thread_re_enum; #endif // ENABLE_RE_ENUM_THREAD static CyBool_t g_app_running = CyFalse; -static uint8_t g_fx3_state = STATE_UNDEFINED; +static uint8_t g_fx3_state = STATE_UNDEFINED; -#define USB2_VREQ_BUF_SIZE 64 -#define USB3_VREQ_BUF_SIZE 512 -#define MIN_VREQ_BUF_SIZE USB2_VREQ_BUF_SIZE -#define MAX_VREQ_BUF_SIZE USB3_VREQ_BUF_SIZE +#define USB2_VREQ_BUF_SIZE 64 +#define USB3_VREQ_BUF_SIZE 512 +#define MIN_VREQ_BUF_SIZE USB2_VREQ_BUF_SIZE +#define MAX_VREQ_BUF_SIZE USB3_VREQ_BUF_SIZE static uint16_t g_vendor_req_buff_size = MIN_VREQ_BUF_SIZE; -static uint8_t g_vendor_req_buffer[MAX_VREQ_BUF_SIZE] __attribute__ ((aligned (32))); +static uint8_t g_vendor_req_buffer[MAX_VREQ_BUF_SIZE] __attribute__((aligned(32))); static uint16_t g_vendor_req_read_count = 0; -static uint8_t fpga_hash[4] __attribute__ ((aligned (32))); -static uint8_t fw_hash[4] __attribute__ ((aligned (32))); +static uint8_t fpga_hash[4] __attribute__((aligned(32))); +static uint8_t fw_hash[4] __attribute__((aligned(32))); static uint8_t compat_num[2]; static uint32_t g_fpga_programming_write_count = 0; -#define COUNTER_MAGIC 0x10024001 -#define LOG_BUFFER_SIZE /*MAX_VREQ_BUF_SIZE*/1024 // [Max vreq @ USB3 (64 @ USB2)] Can be larger +#define COUNTER_MAGIC 0x10024001 +#define LOG_BUFFER_SIZE /*MAX_VREQ_BUF_SIZE*/ \ + 1024 // [Max vreq @ USB3 (64 @ USB2)] Can be larger static char log_buffer[LOG_BUFFER_SIZE]; static char log_contiguous_buffer[LOG_BUFFER_SIZE]; static int log_buffer_idx = 0, log_buffer_len = 0; @@ -179,38 +195,31 @@ static int log_buffer_idx = 0, log_buffer_len = 0; static int log_count = 0; #endif // ENABLE_MSG -#define USB_EVENT_LOG_SIZE 64 +#define USB_EVENT_LOG_SIZE 64 static uint8_t g_usb_event_log[USB_EVENT_LOG_SIZE]; static uint16_t g_last_usb_event_log_index = 0; static uint8_t g_usb_event_log_contiguous_buf[USB_EVENT_LOG_SIZE]; #ifdef ENABLE_FPGA_SB static CyBool_t g_fpga_sb_enabled = CyFalse; -//static uint16_t g_fpga_sb_uart_div = 434*2; +// static uint16_t g_fpga_sb_uart_div = 434*2; static uint16_t g_fpga_sb_last_usb_event_log_index = 0; static CyU3PThread thread_fpga_sb_poll; static CyU3PMutex g_suart_lock; #endif // ENABLE_FPGA_SB -static CyU3PMutex g_log_lock, g_counters_lock, g_counters_dma_from_host_lock, g_counters_dma_to_host_lock; +static CyU3PMutex g_log_lock, g_counters_lock, g_counters_dma_from_host_lock, + g_counters_dma_to_host_lock; -#define FPGA_SB_UART_ADDR_BASE 0x00 +#define FPGA_SB_UART_ADDR_BASE 0x00 -enum UARTRegs -{ - SUART_CLKDIV, - SUART_TXLEVEL, - SUART_RXLEVEL, - SUART_TXCHAR, - SUART_RXCHAR -}; +enum UARTRegs { SUART_CLKDIV, SUART_TXLEVEL, SUART_RXLEVEL, SUART_TXCHAR, SUART_RXCHAR }; -enum UARTPacketType -{ - UPT_NONE = '\0', - UPT_MSG = ' ', - UPT_COUNTERS = 'C', - UPT_USB_EVENTS = 'U', +enum UARTPacketType { + UPT_NONE = '\0', + UPT_MSG = ' ', + UPT_COUNTERS = 'C', + UPT_USB_EVENTS = 'U', }; enum ConfigFlags { @@ -225,57 +234,60 @@ enum ConfigFlags { CF_MANUAL_DMA = 1 << 7, CF_SB_BAUD_DIV = 1 << 8, - CF_RE_ENUM = 1 << 31 + CF_RE_ENUM = 1 << 31 }; -typedef struct Config { - int tx_swing; // [90] [65] 45 - int tx_deemphasis; // 0x11 - int disable_usb2; // 0 - int enable_as_superspeed; // 1 - int pport_drive_strength; // CY_U3P_DS_THREE_QUARTER_STRENGTH - int dma_buffer_size; // [USB3] (max) - int dma_buffer_count; // [USB3] 2 - int manual_dma; // 0 - int sb_baud_div; // 434*2 +typedef struct Config +{ + int tx_swing; // [90] [65] 45 + int tx_deemphasis; // 0x11 + int disable_usb2; // 0 + int enable_as_superspeed; // 1 + int pport_drive_strength; // CY_U3P_DS_THREE_QUARTER_STRENGTH + int dma_buffer_size; // [USB3] (max) + int dma_buffer_count; // [USB3] 2 + int manual_dma; // 0 + int sb_baud_div; // 434*2 } CONFIG, *PCONFIG; -typedef struct ConfigMod { +typedef struct ConfigMod +{ int flags; CONFIG config; } CONFIG_MOD, *PCONFIG_MOD; static CONFIG g_config = { - 65, // tx_swing - 0x11, // tx_deemphasis - 0, // disable_usb2 - 1, // enable_as_superspeed - CY_U3P_DS_THREE_QUARTER_STRENGTH, // pport_drive_strength - 16*1024, // dma_buffer_size - optimized value from Cypress AN86947 - 2, // dma_buffer_count - optimized value from Cypress AN86947 - 0, // manual_dma - 434*2 // sb_baud_div + 65, // tx_swing + 0x11, // tx_deemphasis + 0, // disable_usb2 + 1, // enable_as_superspeed + CY_U3P_DS_THREE_QUARTER_STRENGTH, // pport_drive_strength + 16 * 1024, // dma_buffer_size - optimized value from Cypress AN86947 + 2, // dma_buffer_count - optimized value from Cypress AN86947 + 0, // manual_dma + 434 * 2 // sb_baud_div }; static CONFIG_MOD g_config_mod; #define REG_LNK_PHY_ERROR_STATUS 0xE0033044 enum PhyErrors { - PHYERR_PHY_LOCK_EV = 1 << 8, - PHYERR_TRAINING_ERROR_EV = 1 << 7, - PHYERR_RX_ERROR_CRC32_EV = 1 << 6, - PHYERR_RX_ERROR_CRC16_EV = 1 << 5, - PHYERR_RX_ERROR_CRC5_EV = 1 << 4, - PHYERR_PHY_ERROR_DISPARITY_EV = 1 << 3, - PHYERR_PHY_ERROR_EB_UND_EV = 1 << 2, - PHYERR_PHY_ERROR_EB_OVR_EV = 1 << 1, - PHYERR_PHY_ERROR_DECODE_EV = 1 << 0, + PHYERR_PHY_LOCK_EV = 1 << 8, + PHYERR_TRAINING_ERROR_EV = 1 << 7, + PHYERR_RX_ERROR_CRC32_EV = 1 << 6, + PHYERR_RX_ERROR_CRC16_EV = 1 << 5, + PHYERR_RX_ERROR_CRC5_EV = 1 << 4, + PHYERR_PHY_ERROR_DISPARITY_EV = 1 << 3, + PHYERR_PHY_ERROR_EB_UND_EV = 1 << 2, + PHYERR_PHY_ERROR_EB_OVR_EV = 1 << 1, + PHYERR_PHY_ERROR_DECODE_EV = 1 << 0, - PHYERR_MAX = PHYERR_PHY_LOCK_EV, - PHYERR_MASK = (PHYERR_MAX << 1) - 1 + PHYERR_MAX = PHYERR_PHY_LOCK_EV, + PHYERR_MASK = (PHYERR_MAX << 1) - 1 }; -typedef struct USBErrorCounters { +typedef struct USBErrorCounters +{ int phy_error_count; int link_error_count; @@ -290,7 +302,8 @@ typedef struct USBErrorCounters { int PHY_ERROR_DECODE_EV; } USB_ERROR_COUNTERS, *PUSB_ERROR_COUNTERS; -typedef struct DMACounters { +typedef struct DMACounters +{ int XFER_CPLT; int SEND_CPLT; int RECV_CPLT; @@ -315,10 +328,11 @@ typedef struct DMACounters { typedef struct PIBCounters { - int socket_inactive; // CYU3P_PIB_ERR_THR1_SCK_INACTIVE + int socket_inactive; // CYU3P_PIB_ERR_THR1_SCK_INACTIVE } PIB_COUNTERS, *PPIB_COUNTERS; -typedef struct Counters { +typedef struct Counters +{ int magic; DMA_COUNTERS dma_to_host; @@ -344,40 +358,38 @@ typedef struct Counters { volatile static COUNTERS g_counters; #ifndef min -#define min(a,b) ((a)<(b)?(a):(b)) +# define min(a, b) ((a) < (b) ? (a) : (b)) #endif // min -#define LOCKP(p) CyU3PMutexGet(p, CYU3P_WAIT_FOREVER) -#define UNLOCKP(p) CyU3PMutexPut(p) -#define LOCK(p) LOCKP(&p) -#define UNLOCK(p) UNLOCKP(&p) +#define LOCKP(p) CyU3PMutexGet(p, CYU3P_WAIT_FOREVER) +#define UNLOCKP(p) CyU3PMutexPut(p) +#define LOCK(p) LOCKP(&p) +#define UNLOCK(p) UNLOCKP(&p) //////////////////////////////////////////////////////////////////////////////// -char *heap_end = 0; +char* heap_end = 0; caddr_t _sbrk(int incr) { #ifdef HAS_HEAP extern char __heap_start; extern char __heap_end; - char *prev_heap_end; + char* prev_heap_end; - if (heap_end == 0) - { - heap_end = (char *)&__heap_start; + if (heap_end == 0) { + heap_end = (char*)&__heap_start; } prev_heap_end = heap_end; - if (heap_end + incr > &__heap_end) - { - return (caddr_t) 0; + if (heap_end + incr > &__heap_end) { + return (caddr_t)0; } heap_end += incr; - g_counters.heap_size += incr; // Not sync'd + g_counters.heap_size += incr; // Not sync'd - return (caddr_t) prev_heap_end; + return (caddr_t)prev_heap_end; #else - return (caddr_t) -1; + return (caddr_t)-1; #endif // HAS_HEAP } @@ -387,17 +399,17 @@ void b200_start_fpga_sb_gpio(void); void sb_write(uint8_t reg, uint32_t val); void _sb_write_string(const char* msg); -void msg(const char* str, ...) { +void msg(const char* str, ...) +{ #define msg_CHECK_USE_LOCK -//void _msgv(int use_lock, const char* str, va_list args) { -//#define msg_CHECK_USE_LOCK if (use_lock) +// void _msgv(int use_lock, const char* str, va_list args) { +// #define msg_CHECK_USE_LOCK if (use_lock) #ifdef ENABLE_MSG va_list args; static char buf[LOG_BUFFER_SIZE]; int idx = 0; - msg_CHECK_USE_LOCK - LOCK(g_log_lock); + msg_CHECK_USE_LOCK LOCK(g_log_lock); ++log_count; log_count %= 10000; @@ -407,44 +419,42 @@ void msg(const char* str, ...) { if (1) { // FIXME: Optional uint32_t time_now = CyU3PGetTime(); idx += sprintf(buf, "%08X %04i ", (uint)time_now, log_count); - } - else + } else idx += sprintf(buf, "%04i ", log_count); idx += vsnprintf(buf + idx, LOG_BUFFER_SIZE - idx, str, args); va_end(args); if ((LOG_BUFFER_SIZE - log_buffer_len) < (idx + 1 + 1)) { - msg_CHECK_USE_LOCK - LOCK(g_counters_lock); + msg_CHECK_USE_LOCK LOCK(g_counters_lock); ++g_counters.log_overrun_count; - msg_CHECK_USE_LOCK - UNLOCK(g_counters_lock); + msg_CHECK_USE_LOCK UNLOCK(g_counters_lock); goto msg_exit; } - // Circular buffer if we need it later, but currently won't wrap due to above condition - memcpy(log_buffer + log_buffer_len, buf, min(idx + 1, LOG_BUFFER_SIZE - log_buffer_len)); - if ((idx + 1) > (LOG_BUFFER_SIZE - log_buffer_len)) - { - memcpy(log_buffer, buf + (LOG_BUFFER_SIZE - log_buffer_len), (idx + 1) - (LOG_BUFFER_SIZE - log_buffer_len)); + // Circular buffer if we need it later, but currently won't wrap due to above + // condition + memcpy( + log_buffer + log_buffer_len, buf, min(idx + 1, LOG_BUFFER_SIZE - log_buffer_len)); + if ((idx + 1) > (LOG_BUFFER_SIZE - log_buffer_len)) { + memcpy(log_buffer, + buf + (LOG_BUFFER_SIZE - log_buffer_len), + (idx + 1) - (LOG_BUFFER_SIZE - log_buffer_len)); log_buffer[(idx + 1) - (LOG_BUFFER_SIZE - log_buffer_len)] = '\0'; - } - else + } else log_buffer[log_buffer_len + idx + 1] = '\0'; log_buffer_len += (idx + 1); msg_exit: - msg_CHECK_USE_LOCK - UNLOCK(g_log_lock); -#ifdef ENABLE_FPGA_SB + msg_CHECK_USE_LOCK UNLOCK(g_log_lock); +# ifdef ENABLE_FPGA_SB LOCK(g_suart_lock); sb_write(SUART_TXCHAR, UPT_MSG); _sb_write_string(buf); _sb_write_string("\r\n"); UNLOCK(g_suart_lock); -#endif // ENABLE_FPGA_SB +# endif // ENABLE_FPGA_SB #endif // ENABLE_MSG } /* @@ -464,25 +474,28 @@ void msg_nl(const char* str, ...) va_end(args); } */ -void log_reset(void) { - //LOCK(g_log_lock); +void log_reset(void) +{ + // LOCK(g_log_lock); log_buffer_idx = 0; log_buffer_len = 0; - log_buffer[0] = '\0'; + log_buffer[0] = '\0'; - //UNLOCK(g_log_lock); + // UNLOCK(g_log_lock); } -void counters_auto_reset(void) { - //LOCK(g_counters_lock); +void counters_auto_reset(void) +{ + // LOCK(g_counters_lock); g_counters.log_overrun_count = 0; - //UNLOCK(g_counters_lock); + // UNLOCK(g_counters_lock); } -void counters_dma_reset(void) { +void counters_dma_reset(void) +{ LOCK(g_counters_lock); LOCK(g_counters_dma_to_host_lock); @@ -496,178 +509,192 @@ void counters_dma_reset(void) { UNLOCK(g_counters_lock); } -void counters_reset_usb_errors(void) { +void counters_reset_usb_errors(void) +{ LOCK(g_counters_lock); g_counters.usb_error_update_count = 0; - memset((void*)&g_counters.usb_error_counters, 0x00, sizeof(g_counters.usb_error_counters)); + memset((void*)&g_counters.usb_error_counters, + 0x00, + sizeof(g_counters.usb_error_counters)); UNLOCK(g_counters_lock); } #ifdef ENABLE_MANUAL_DMA_XFER /* Callback funtion for the DMA event notification. */ -void dma_callback ( - CyU3PDmaChannel *chHandle, /* Handle to the DMA channel. */ - CyU3PDmaCbType_t type, /* Callback type. */ - CyU3PDmaCBInput_t *input, /* Callback status. */ - int from_host) +void dma_callback(CyU3PDmaChannel* chHandle, /* Handle to the DMA channel. */ + CyU3PDmaCbType_t type, /* Callback type. */ + CyU3PDmaCBInput_t* input, /* Callback status. */ + int from_host) { CyU3PReturnStatus_t status = CY_U3P_SUCCESS; - PDMA_COUNTERS cnt = (PDMA_COUNTERS)(from_host ? &g_counters.dma_from_host : &g_counters.dma_to_host); - CyU3PMutex* lock = (from_host ? &g_counters_dma_from_host_lock : &g_counters_dma_to_host_lock); + PDMA_COUNTERS cnt = + (PDMA_COUNTERS)(from_host ? &g_counters.dma_from_host : &g_counters.dma_to_host); + CyU3PMutex* lock = + (from_host ? &g_counters_dma_from_host_lock : &g_counters_dma_to_host_lock); uint16_t buffer_status = (input->buffer_p.status & CY_U3P_DMA_BUFFER_STATUS_MASK); - if (buffer_status & CY_U3P_DMA_BUFFER_MARKER) - { + if (buffer_status & CY_U3P_DMA_BUFFER_MARKER) { cnt->BUFFER_MARKER++; } - if (buffer_status & CY_U3P_DMA_BUFFER_EOP) - { + if (buffer_status & CY_U3P_DMA_BUFFER_EOP) { cnt->BUFFER_EOP++; } - if (buffer_status & CY_U3P_DMA_BUFFER_ERROR) - { + if (buffer_status & CY_U3P_DMA_BUFFER_ERROR) { cnt->BUFFER_ERROR++; } - if (buffer_status & CY_U3P_DMA_BUFFER_OCCUPIED) - { + if (buffer_status & CY_U3P_DMA_BUFFER_OCCUPIED) { cnt->BUFFER_OCCUPIED++; } - if (type == CY_U3P_DMA_CB_PROD_EVENT) - { -#ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG + if (type == CY_U3P_DMA_CB_PROD_EVENT) { +# ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG LOCKP(lock); int prod_cnt = cnt->PROD_EVENT++; UNLOCKP(lock); - //if (cnt->last_count != input->buffer_p.count) - // msg("[DMA%d %05d] buffer.count (%05d) != last_count (%05d)", from_host, prod_cnt, input->buffer_p.count, cnt->last_count); + // if (cnt->last_count != input->buffer_p.count) + // msg("[DMA%d %05d] buffer.count (%05d) != last_count (%05d)", from_host, + // prod_cnt, input->buffer_p.count, cnt->last_count); cnt->last_count = input->buffer_p.count; if (cnt->last_size != input->buffer_p.size) - msg("[DMA%d %05d] buffer.size (%05d) != last_size (%05d)", from_host, prod_cnt, input->buffer_p.size, cnt->last_size); + msg("[DMA%d %05d] buffer.size (%05d) != last_size (%05d)", + from_host, + prod_cnt, + input->buffer_p.size, + cnt->last_size); cnt->last_size = input->buffer_p.size; uint32_t* p32 = input->buffer_p.buffer; - uint32_t sid = p32[1]; + uint32_t sid = p32[1]; cnt->last_sid = (int)sid; - if (((from_host == 0) && ((sid != 0xa0) && (sid != 0xb0))) || - ((from_host == 1) && ((sid != 0x50) && (sid != 0x60)))) - { + if (((from_host == 0) && ((sid != 0xa0) && (sid != 0xb0))) + || ((from_host == 1) && ((sid != 0x50) && (sid != 0x60)))) { cnt->bad_sid_count++; msg("[DMA%d %05d] Bad SID: 0x%08x", from_host, prod_cnt, sid); } uint16_t* p16 = input->buffer_p.buffer; - if (p32[0] & (((uint32_t)1) << 31)) - { - msg("[DMA%d %05d] Error code: 0x%x (packet len: %05d, buffer count: %05d, seq: %04d)", from_host, prod_cnt, p32[4], p16[0], input->buffer_p.count, (p16[1] & 0x0fff)); // Status + if (p32[0] & (((uint32_t)1) << 31)) { + msg("[DMA%d %05d] Error code: 0x%x (packet len: %05d, buffer count: %05d, " + "seq: %04d)", + from_host, + prod_cnt, + p32[4], + p16[0], + input->buffer_p.count, + (p16[1] & 0x0fff)); // Status - //msg("[DMA%d] 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x", from_host, p32[0], p32[1], p32[2], p32[3], p32[4], p32[5]); - } - else - { - if (p16[1] & (((uint16_t)1) << 12)) - { - msg("[DMA%d %05d] EOB (packet len: %05d, buffer count: %05d)", from_host, prod_cnt, p16[0], input->buffer_p.count); // Comes with one sample + // msg("[DMA%d] 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x", from_host, p32[0], + // p32[1], p32[2], p32[3], p32[4], p32[5]); + } else { + if (p16[1] & (((uint16_t)1) << 12)) { + msg("[DMA%d %05d] EOB (packet len: %05d, buffer count: %05d)", + from_host, + prod_cnt, + p16[0], + input->buffer_p.count); // Comes with one sample } - if ((p16[0] != input->buffer_p.count) && - ((p16[0] + 4) != input->buffer_p.count)) // Case of overrun packet length being padded (being rounded up) + if ((p16[0] != input->buffer_p.count) + && ((p16[0] + 4) + != input->buffer_p.count)) // Case of overrun packet length being + // padded (being rounded up) { if (from_host == 0) - msg("[DMA%d %05d] Packet len (%05d) != buffer count (%05d), seq: %04d [0x%04x 0x%04x]", from_host, prod_cnt, p16[0], input->buffer_p.count, (p16[1] & 0x0fff), p16[0], p16[1]); + msg("[DMA%d %05d] Packet len (%05d) != buffer count (%05d), seq: " + "%04d [0x%04x 0x%04x]", + from_host, + prod_cnt, + p16[0], + input->buffer_p.count, + (p16[1] & 0x0fff), + p16[0], + p16[1]); } - //msg("[DMA%d] 0x%04x 0x%04x 0x%04x 0x%04x", from_host, p16[0], p16[1], p16[2], p16[3]); + // msg("[DMA%d] 0x%04x 0x%04x 0x%04x 0x%04x", from_host, p16[0], p16[1], + // p16[2], p16[3]); if (p16[1] & (((uint16_t)1) << 12)) - msg("[DMA%d %05d] 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x", from_host, prod_cnt, p32[0], p32[1], p32[2], p32[3], p32[4], p32[5]); + msg("[DMA%d %05d] 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x", + from_host, + prod_cnt, + p32[0], + p32[1], + p32[2], + p32[3], + p32[4], + p32[5]); } -#endif // ENABLE_DMA_BUFFER_PACKET_DEBUG - status = CyU3PDmaChannelCommitBuffer (chHandle, input->buffer_p.count, 0); -#ifndef ENABLE_DMA_BUFFER_PACKET_DEBUG +# endif // ENABLE_DMA_BUFFER_PACKET_DEBUG + status = CyU3PDmaChannelCommitBuffer(chHandle, input->buffer_p.count, 0); + if (status != CY_U3P_SUCCESS) + msg("! CommitBuffer %i (%d)", from_host, status); +# ifndef ENABLE_DMA_BUFFER_PACKET_DEBUG LOCKP(lock); cnt->PROD_EVENT++; UNLOCKP(lock); -#endif // !ENABLE_DMA_BUFFER_PACKET_DEBUG - } - else if (type == CY_U3P_DMA_CB_CONS_EVENT) - { +# endif // !ENABLE_DMA_BUFFER_PACKET_DEBUG + } else if (type == CY_U3P_DMA_CB_CONS_EVENT) { LOCKP(lock); cnt->CONS_EVENT++; UNLOCKP(lock); - } - else if (type == CY_U3P_DMA_CB_XFER_CPLT) - { + } else if (type == CY_U3P_DMA_CB_XFER_CPLT) { LOCKP(lock); cnt->XFER_CPLT++; UNLOCKP(lock); - } - else if (type == CY_U3P_DMA_CB_SEND_CPLT) - { + } else if (type == CY_U3P_DMA_CB_SEND_CPLT) { LOCKP(lock); cnt->SEND_CPLT++; UNLOCKP(lock); - } - else if (type == CY_U3P_DMA_CB_RECV_CPLT) - { + } else if (type == CY_U3P_DMA_CB_RECV_CPLT) { LOCKP(lock); cnt->RECV_CPLT++; UNLOCKP(lock); - } - else if (type == CY_U3P_DMA_CB_ABORTED) - { + } else if (type == CY_U3P_DMA_CB_ABORTED) { LOCKP(lock); cnt->ABORTED++; UNLOCKP(lock); msg("! Aborted %i", from_host); - } - else if (type == CY_U3P_DMA_CB_ERROR) - { + } else if (type == CY_U3P_DMA_CB_ERROR) { LOCKP(lock); cnt->ERROR++; UNLOCKP(lock); msg("! Error %i", from_host); - } - else if (type == CY_U3P_DMA_CB_PROD_SUSP) - { + } else if (type == CY_U3P_DMA_CB_PROD_SUSP) { LOCKP(lock); cnt->PROD_SUSP++; UNLOCKP(lock); msg("! Prod suspend %i", from_host); - } - else if (type == CY_U3P_DMA_CB_CONS_SUSP) - { + } else if (type == CY_U3P_DMA_CB_CONS_SUSP) { LOCKP(lock); cnt->CONS_SUSP++; UNLOCKP(lock); - //msg("! Cons suspend %i", from_host); + // msg("! Cons suspend %i", from_host); - CyU3PDmaChannelResume (chHandle, CyFalse, CyTrue); + CyU3PDmaChannelResume(chHandle, CyFalse, CyTrue); } } -void from_host_dma_callback ( - CyU3PDmaChannel *chHandle, /* Handle to the DMA channel. */ - CyU3PDmaCbType_t type, /* Callback type. */ - CyU3PDmaCBInput_t *input) /* Callback status. */ +void from_host_dma_callback(CyU3PDmaChannel* chHandle, /* Handle to the DMA channel. */ + CyU3PDmaCbType_t type, /* Callback type. */ + CyU3PDmaCBInput_t* input) /* Callback status. */ { return dma_callback(chHandle, type, input, 1); } -void to_host_dma_callback ( - CyU3PDmaChannel *chHandle, /* Handle to the DMA channel. */ - CyU3PDmaCbType_t type, /* Callback type. */ - CyU3PDmaCBInput_t *input) /* Callback status. */ +void to_host_dma_callback(CyU3PDmaChannel* chHandle, /* Handle to the DMA channel. */ + CyU3PDmaCbType_t type, /* Callback type. */ + CyU3PDmaCBInput_t* input) /* Callback status. */ { return dma_callback(chHandle, type, input, 0); } @@ -677,21 +704,26 @@ void to_host_dma_callback ( * * This function is invoked by the GPIO interrupt handler when pins configured * as inputs with interrupts are triggered. */ -void gpio_interrupt_callback(uint8_t gpio_id) { +void gpio_interrupt_callback(uint8_t gpio_id) +{ CyBool_t gpio_value; - if ((gpio_id == GPIO_DONE) && (g_fx3_state == STATE_CONFIGURING_FPGA)) { // Only proceed if in the correct FX3 state + if ((gpio_id == GPIO_DONE) + && (g_fx3_state + == STATE_CONFIGURING_FPGA)) { // Only proceed if in the correct FX3 state CyU3PGpioGetValue(gpio_id, &gpio_value); - if(gpio_value == CyTrue) { - //msg("DONE HIGH"); + if (gpio_value == CyTrue) { + // msg("DONE HIGH"); CyU3PEventSet(&g_event_usb_config, EVENT_GPIO_DONE_HIGH, CYU3P_EVENT_OR); } - } else if ((gpio_id == GPIO_INIT_B) && (g_fx3_state == STATE_FPGA_READY)) { // Only proceed if in the correct FX3 state + } else if ((gpio_id == GPIO_INIT_B) + && (g_fx3_state + == STATE_FPGA_READY)) { // Only proceed if in the correct FX3 state CyU3PGpioGetValue(gpio_id, &gpio_value); - if(gpio_value == CyTrue) { - //msg("INITB_RISE"); + if (gpio_value == CyTrue) { + // msg("INITB_RISE"); CyU3PEventSet(&g_event_usb_config, EVENT_GPIO_INITB_RISE, CYU3P_EVENT_OR); } } @@ -703,7 +735,8 @@ void gpio_interrupt_callback(uint8_t gpio_id) { * This function is essentially a destructor for all transport configurations. * It ensures that if the USB configuration is reset without a power reboot, * everything will come back up properly. */ -void b200_fw_stop(void) { +void b200_fw_stop(void) +{ msg("b200_fw_stop"); CyU3PEpConfig_t usb_endpoint_config; @@ -718,7 +751,8 @@ void b200_fw_stop(void) { CyU3PUsbFlushEp(CTRL_ENDPOINT_CONSUMER); /* Reset the DMA channels */ - // SDK 1.3 known issue #1 - probably not necessary since Destroy is next, but just in case + // SDK 1.3 known issue #1 - probably not necessary since Destroy is next, but just in + // case CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle); CyU3PDmaChannelReset(&ctrl_cons_to_prod_chan_handle); @@ -731,8 +765,7 @@ void b200_fw_stop(void) { CyU3PDmaChannelDestroy(&ctrl_prod_to_cons_chan_handle); /* Disable endpoints. */ - CyU3PMemSet((uint8_t *) &usb_endpoint_config, 0, \ - sizeof(usb_endpoint_config)); + CyU3PMemSet((uint8_t*)&usb_endpoint_config, 0, sizeof(usb_endpoint_config)); usb_endpoint_config.enable = CyFalse; CyU3PSetEpConfig(DATA_ENDPOINT_PRODUCER, &usb_endpoint_config); @@ -742,14 +775,15 @@ void b200_fw_stop(void) { } -void reset_gpif(void) { +void reset_gpif(void) +{ g_fx3_state = STATE_BUSY; // Put the FPGA into RESET CyU3PGpioSetValue(GPIO_FPGA_RESET, CyTrue); // Bring down GPIF - CyU3PGpifDisable(/*CyTrue*/CyFalse); + CyU3PGpifDisable(/*CyTrue*/ CyFalse); /* Reset the DMA channels */ CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); @@ -770,17 +804,17 @@ void reset_gpif(void) { CyU3PUsbFlushEp(CTRL_ENDPOINT_CONSUMER); /* Load the GPIF configuration for Slave FIFO sync mode. */ - //CyU3PGpifLoad(&CyFxGpifConfig); + // CyU3PGpifLoad(&CyFxGpifConfig); /* Start the state machine. */ - //if (CyU3PGpifSMStart(RESET, ALPHA_RESET) != CY_U3P_SUCCESS) - // msg("! CyU3PGpifSMStart"); + // if (CyU3PGpifSMStart(RESET, ALPHA_RESET) != CY_U3P_SUCCESS) + // msg("! CyU3PGpifSMStart"); /* Configure the watermarks for the slfifo-write buffers. */ - //CyU3PGpifSocketConfigure(0, DATA_TX_PPORT_SOCKET, 5, CyFalse, 1); - //CyU3PGpifSocketConfigure(1, DATA_RX_PPORT_SOCKET, 6, CyFalse, 1); - //CyU3PGpifSocketConfigure(2, CTRL_COMM_PPORT_SOCKET, 5, CyFalse, 1); - //CyU3PGpifSocketConfigure(3, CTRL_RESP_PPORT_SOCKET, 6, CyFalse, 1); + // CyU3PGpifSocketConfigure(0, DATA_TX_PPORT_SOCKET, 5, CyFalse, 1); + // CyU3PGpifSocketConfigure(1, DATA_RX_PPORT_SOCKET, 6, CyFalse, 1); + // CyU3PGpifSocketConfigure(2, CTRL_COMM_PPORT_SOCKET, 5, CyFalse, 1); + // CyU3PGpifSocketConfigure(3, CTRL_RESP_PPORT_SOCKET, 6, CyFalse, 1); CyU3PGpioSetValue(GPIO_FPGA_RESET, CyFalse); @@ -801,33 +835,29 @@ void eeprom_read(uint16_t addr, uint8_t* buffer, uint8_t length) CyFxUsbI2cTransfer(addr, 0xA0, length, buffer, CyTrue); } -CyU3PReturnStatus_t b200_set_io_matrix(CyBool_t fpga_config_mode) { +CyU3PReturnStatus_t b200_set_io_matrix(CyBool_t fpga_config_mode) +{ CyU3PIoMatrixConfig_t io_config_matrix; CyU3PReturnStatus_t res; /* Configure the IO peripherals on the FX3. The gpioSimpleEn arrays are * bitmaps, where each bit represents the GPIO of the matching index - the * second array is index + 32. */ - CyU3PMemSet((uint8_t *) &io_config_matrix, 0, sizeof(io_config_matrix)); - io_config_matrix.isDQ32Bit = (fpga_config_mode == CyFalse); - io_config_matrix.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT; + CyU3PMemSet((uint8_t*)&io_config_matrix, 0, sizeof(io_config_matrix)); + io_config_matrix.isDQ32Bit = (fpga_config_mode == CyFalse); + io_config_matrix.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT; io_config_matrix.gpioSimpleEn[0] = 0 | MASK_GPIO_FPGA_SB_SCL | MASK_GPIO_FPGA_SB_SDA; - io_config_matrix.gpioSimpleEn[1] = MASK_GPIO_PROGRAM_B \ - | MASK_GPIO_INIT_B \ - | (fpga_config_mode ? 0 : \ - // Used once FPGA config is done to bit-bang SPI, etc. - MASK_GPIO_SHDN_SW \ - | MASK_GPIO_AUX_PWR_ON \ - | MASK_GPIO_FX3_SCLK \ - | MASK_GPIO_FX3_CE \ - | MASK_GPIO_FX3_MISO \ - | MASK_GPIO_FX3_MOSI); + io_config_matrix.gpioSimpleEn[1] = + MASK_GPIO_PROGRAM_B | MASK_GPIO_INIT_B + | (fpga_config_mode ? 0 : // Used once FPGA config is done to bit-bang SPI, etc. + MASK_GPIO_SHDN_SW | MASK_GPIO_AUX_PWR_ON | MASK_GPIO_FX3_SCLK + | MASK_GPIO_FX3_CE | MASK_GPIO_FX3_MISO | MASK_GPIO_FX3_MOSI); io_config_matrix.gpioComplexEn[0] = 0; io_config_matrix.gpioComplexEn[1] = 0; - io_config_matrix.useUart = CyFalse; - io_config_matrix.useI2C = CyTrue; - io_config_matrix.useI2S = CyFalse; - io_config_matrix.useSpi = fpga_config_mode; + io_config_matrix.useUart = CyFalse; + io_config_matrix.useI2C = CyTrue; + io_config_matrix.useI2S = CyFalse; + io_config_matrix.useSpi = fpga_config_mode; res = CyU3PDeviceConfigureIOMatrix(&io_config_matrix); if (res != CY_U3P_SUCCESS) @@ -837,21 +867,22 @@ CyU3PReturnStatus_t b200_set_io_matrix(CyBool_t fpga_config_mode) { } -CyU3PReturnStatus_t b200_gpio_init(CyBool_t set_callback) { +CyU3PReturnStatus_t b200_gpio_init(CyBool_t set_callback) +{ CyU3PGpioClock_t gpio_clock_config; CyU3PReturnStatus_t res; /* Since we are only using FX3's 'simple GPIO' functionality, these values * must *NOT* change. Cypress says changing them will break stuff. */ - CyU3PMemSet((uint8_t *) &gpio_clock_config, 0, \ - sizeof(gpio_clock_config)); + CyU3PMemSet((uint8_t*)&gpio_clock_config, 0, sizeof(gpio_clock_config)); gpio_clock_config.fastClkDiv = 2; gpio_clock_config.slowClkDiv = 0; - gpio_clock_config.simpleDiv = CY_U3P_GPIO_SIMPLE_DIV_BY_2; - gpio_clock_config.clkSrc = CY_U3P_SYS_CLK; - gpio_clock_config.halfDiv = 0; + gpio_clock_config.simpleDiv = CY_U3P_GPIO_SIMPLE_DIV_BY_2; + gpio_clock_config.clkSrc = CY_U3P_SYS_CLK; + gpio_clock_config.halfDiv = 0; - res = CyU3PGpioInit(&gpio_clock_config, (set_callback ? gpio_interrupt_callback : NULL)); + res = CyU3PGpioInit( + &gpio_clock_config, (set_callback ? gpio_interrupt_callback : NULL)); if (res != CY_U3P_SUCCESS) msg("! CyU3PGpioInit"); @@ -859,7 +890,8 @@ CyU3PReturnStatus_t b200_gpio_init(CyBool_t set_callback) { } -void sb_write(uint8_t reg, uint32_t val) { +void sb_write(uint8_t reg, uint32_t val) +{ #ifdef ENABLE_FPGA_SB const int len = 32; int i; @@ -869,10 +901,10 @@ void sb_write(uint8_t reg, uint32_t val) { reg += FPGA_SB_UART_ADDR_BASE; - //CyU3PBusyWait(1); // Can be used after each SetValue to slow down bit changes + // CyU3PBusyWait(1); // Can be used after each SetValue to slow down bit changes // START - CyU3PGpioSetValue(GPIO_FPGA_SB_SCL, 1); // Should already be 1 + CyU3PGpioSetValue(GPIO_FPGA_SB_SCL, 1); // Should already be 1 CyU3PGpioSetValue(GPIO_FPGA_SB_SDA, 0); // ADDR[8] @@ -885,7 +917,7 @@ void sb_write(uint8_t reg, uint32_t val) { } // DATA[32] - for (i = (len-1); i >= 0; i--) { + for (i = (len - 1); i >= 0; i--) { uint8_t bit = ((val & (0x1 << i)) ? 0x01 : 0x00); CyU3PGpioSetValue(GPIO_FPGA_SB_SCL, 0); CyU3PGpioSetValue(GPIO_FPGA_SB_SDA, bit); @@ -902,7 +934,8 @@ void sb_write(uint8_t reg, uint32_t val) { } -void _sb_write_string(const char* msg) { +void _sb_write_string(const char* msg) +{ #ifdef ENABLE_FPGA_SB while (*msg) { sb_write(SUART_TXCHAR, (uint8_t)(*(msg++))); @@ -911,7 +944,8 @@ void _sb_write_string(const char* msg) { } -void sb_write_string(const char* msg) { +void sb_write_string(const char* msg) +{ #ifdef ENABLE_FPGA_SB LOCK(g_suart_lock); _sb_write_string(msg); @@ -920,7 +954,8 @@ void sb_write_string(const char* msg) { } -void b200_enable_fpga_sb_gpio(CyBool_t enable) { +void b200_enable_fpga_sb_gpio(CyBool_t enable) +{ #ifdef ENABLE_FPGA_SB CyU3PGpioSimpleConfig_t gpio_config; CyU3PReturnStatus_t res; @@ -956,15 +991,22 @@ void b200_enable_fpga_sb_gpio(CyBool_t enable) { } -void b200_start_fpga_sb_gpio(void) { +void b200_start_fpga_sb_gpio(void) +{ #ifdef ENABLE_FPGA_SB LOCK(g_suart_lock); - sb_write(SUART_CLKDIV, /*g_fpga_sb_uart_div*/g_config.sb_baud_div); // 16-bit reg, master clock = 100 MHz (434*2x = 230400/2) + sb_write(SUART_CLKDIV, + /*g_fpga_sb_uart_div*/ g_config + .sb_baud_div); // 16-bit reg, master clock = 100 MHz (434*2x = 230400/2) _sb_write_string("\r\n B2x0 FPGA reset\r\n"); UNLOCK(g_suart_lock); msg("Compat: %d.%d", FX3_COMPAT_MAJOR, FX3_COMPAT_MINOR); - msg("FX3 SDK: %d.%d.%d (build %d)", CYFX_VERSION_MAJOR, CYFX_VERSION_MINOR, CYFX_VERSION_PATCH, CYFX_VERSION_BUILD); + msg("FX3 SDK: %d.%d.%d (build %d)", + CYFX_VERSION_MAJOR, + CYFX_VERSION_MINOR, + CYFX_VERSION_PATCH, + CYFX_VERSION_BUILD); #endif // ENABLE_FPGA_SB } @@ -974,16 +1016,17 @@ void b200_start_fpga_sb_gpio(void) { * This function initializes the FX3 GPIO module, creating a configuration that * allows us to program the FPGA. After the FPGA has been programmed, the * application thread will re-configure some of the pins. */ -void b200_gpios_pre_fpga_config(void) { +void b200_gpios_pre_fpga_config(void) +{ CyU3PGpioSimpleConfig_t gpio_config; - //b200_enable_fpga_sb_gpio(CyFalse); + // b200_enable_fpga_sb_gpio(CyFalse); - //CyU3PGpioDeInit(); + // CyU3PGpioDeInit(); b200_set_io_matrix(CyTrue); - //b200_gpio_init(CyTrue); // This now done once during startup + // b200_gpio_init(CyTrue); // This now done once during startup //////////////////////////////////// @@ -1002,22 +1045,22 @@ void b200_gpios_pre_fpga_config(void) { * driveHighEn = False * outValue = Ignored */ - gpio_config.outValue = CyFalse; - gpio_config.driveLowEn = CyTrue; + gpio_config.outValue = CyFalse; + gpio_config.driveLowEn = CyTrue; gpio_config.driveHighEn = CyTrue; - gpio_config.inputEn = CyFalse; - gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; + gpio_config.inputEn = CyFalse; + gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; CyU3PGpioSetSimpleConfig(GPIO_FPGA_RESET, &gpio_config); CyU3PGpioSetSimpleConfig(GPIO_PROGRAM_B, &gpio_config); /* Reconfigure the GPIO configure struct for inputs that DO require * interrupts attached to them. */ - gpio_config.outValue = CyTrue; - gpio_config.inputEn = CyTrue; - gpio_config.driveLowEn = CyFalse; + gpio_config.outValue = CyTrue; + gpio_config.inputEn = CyTrue; + gpio_config.driveLowEn = CyFalse; gpio_config.driveHighEn = CyFalse; - gpio_config.intrMode = CY_U3P_GPIO_INTR_POS_EDGE; + gpio_config.intrMode = CY_U3P_GPIO_INTR_POS_EDGE; CyU3PGpioSetSimpleConfig(GPIO_DONE, &gpio_config); CyU3PGpioSetSimpleConfig(GPIO_INIT_B, &gpio_config); @@ -1026,20 +1069,22 @@ void b200_gpios_pre_fpga_config(void) { CyU3PGpioSetValue(GPIO_FPGA_RESET, 0); CyU3PGpioSetValue(GPIO_PROGRAM_B, 1); - b200_enable_fpga_sb_gpio(CyTrue); // So SCL/SDA are already high when SB state machine activates + b200_enable_fpga_sb_gpio( + CyTrue); // So SCL/SDA are already high when SB state machine activates } -void b200_slfifo_mode_gpio_config(void) { +void b200_slfifo_mode_gpio_config(void) +{ CyU3PGpioSimpleConfig_t gpio_config; - //b200_enable_fpga_sb_gpio(CyFalse); + // b200_enable_fpga_sb_gpio(CyFalse); - //CyU3PGpioDeInit(); + // CyU3PGpioDeInit(); b200_set_io_matrix(CyFalse); - //b200_gpio_init(CyFalse); // This now done once during startup + // b200_gpio_init(CyFalse); // This now done once during startup //////////////////////////////////// @@ -1062,11 +1107,11 @@ void b200_slfifo_mode_gpio_config(void) { * driveHighEn = False * outValue = Ignored */ - gpio_config.outValue = CyFalse; - gpio_config.driveLowEn = CyTrue; + gpio_config.outValue = CyFalse; + gpio_config.driveLowEn = CyTrue; gpio_config.driveHighEn = CyTrue; - gpio_config.inputEn = CyFalse; - gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; + gpio_config.inputEn = CyFalse; + gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; CyU3PGpioSetSimpleConfig(GPIO_FPGA_RESET, &gpio_config); CyU3PGpioSetSimpleConfig(GPIO_SHDN_SW, &gpio_config); @@ -1076,11 +1121,11 @@ void b200_slfifo_mode_gpio_config(void) { /* Reconfigure the GPIO configure struct for inputs that do NOT require * interrupts attached to them. */ - gpio_config.outValue = CyFalse; - gpio_config.inputEn = CyTrue; - gpio_config.driveLowEn = CyFalse; + gpio_config.outValue = CyFalse; + gpio_config.inputEn = CyTrue; + gpio_config.driveLowEn = CyFalse; gpio_config.driveHighEn = CyFalse; - gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; + gpio_config.intrMode = CY_U3P_GPIO_NO_INTR; CyU3PGpioSetSimpleConfig(GPIO_FX3_MISO, &gpio_config); CyU3PGpioSetSimpleConfig(GPIO_AUX_PWR_ON, &gpio_config); @@ -1096,8 +1141,8 @@ void b200_slfifo_mode_gpio_config(void) { CyU3PGpioSetValue(GPIO_FX3_MOSI, 0); // Disabled here as only useful once FPGA has been programmed - //b200_enable_fpga_sb_gpio(CyTrue); - //b200_start_fpga_sb_gpio(); // Set up SB USART + // b200_enable_fpga_sb_gpio(CyTrue); + // b200_start_fpga_sb_gpio(); // Set up SB USART } @@ -1106,45 +1151,46 @@ void b200_slfifo_mode_gpio_config(void) { * This function creates and connects the USB endpoints, and sets up the DMA * channels. After this is done, everything is 'running' on the FX3 chip, and * ready to receive data from the host. */ -void b200_fw_start(void) { +void b200_fw_start(void) +{ msg("b200_fw_start"); CyU3PDmaChannelConfig_t dma_channel_config; CyU3PEpConfig_t usb_endpoint_config; CyU3PUSBSpeed_t usb_speed; - uint16_t max_packet_size = 0; - uint16_t data_buffer_count = 0; - uint16_t data_buffer_size = 0; - uint16_t data_buffer_size_to_host = 0; + uint16_t max_packet_size = 0; + uint16_t data_buffer_count = 0; + uint16_t data_buffer_size = 0; + uint16_t data_buffer_size_to_host = 0; uint16_t data_buffer_size_from_host = 0; - uint8_t num_packets_per_burst = 0; - CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS; + uint8_t num_packets_per_burst = 0; + CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS; /* Based on the USB bus speed, configure the endpoint packet size * and the DMA buffer size */ usb_speed = CyU3PUsbGetSpeed(); - switch(usb_speed) { + switch (usb_speed) { case CY_U3P_FULL_SPEED: case CY_U3P_HIGH_SPEED: - max_packet_size = 512; - data_buffer_count = g_config.dma_buffer_count; - data_buffer_size = g_config.dma_buffer_size; - g_vendor_req_buff_size = USB2_VREQ_BUF_SIZE; // Max 64 - num_packets_per_burst = USB2_PACKETS_PER_BURST; // 1 + max_packet_size = 512; + data_buffer_count = g_config.dma_buffer_count; + data_buffer_size = g_config.dma_buffer_size; + g_vendor_req_buff_size = USB2_VREQ_BUF_SIZE; // Max 64 + num_packets_per_burst = USB2_PACKETS_PER_BURST; // 1 data_buffer_size_to_host = data_buffer_size_from_host = data_buffer_size; break; case CY_U3P_SUPER_SPEED: -//#ifdef PREVENT_LOW_POWER_MODE - apiRetStatus = CyU3PUsbLPMDisable(); // This still allows my laptop to sleep + // #ifdef PREVENT_LOW_POWER_MODE + apiRetStatus = CyU3PUsbLPMDisable(); // This still allows my laptop to sleep if (apiRetStatus != CY_U3P_SUCCESS) msg("! LPMDisable failed (%d)", apiRetStatus); else msg("LPMDisable OK"); -//#endif // PREVENT_LOW_POWER_MODE + // #endif // PREVENT_LOW_POWER_MODE max_packet_size = 1024; // Per USB3 spec // SDK ver: total available buffer memory @@ -1155,38 +1201,38 @@ void b200_fw_start(void) { // They follow is kept for future testing // 1K - //data_buffer_count = 64; - //data_buffer_size = 1024; + // data_buffer_count = 64; + // data_buffer_size = 1024; // 4K - //data_buffer_count = 8; - //data_buffer_size = 4096; + // data_buffer_count = 8; + // data_buffer_size = 4096; // 8K - //data_buffer_count = 4; - //data_buffer_size = 4096*2; + // data_buffer_count = 4; + // data_buffer_size = 4096*2; // 16K - //data_buffer_count = 2*2; - //data_buffer_size = 16384; // Default 16K + // data_buffer_count = 2*2; + // data_buffer_size = 16384; // Default 16K // 32K - //data_buffer_count = 2; - //data_buffer_size = 16384*2; + // data_buffer_count = 2; + // data_buffer_size = 16384*2; - //data_buffer_count = 1; - //data_buffer_size = ((1 << 16) - 1); - //data_buffer_size = 16384; - //data_buffer_size -= (data_buffer_size % 1024); // Align to 1K boundary + // data_buffer_count = 1; + // data_buffer_size = ((1 << 16) - 1); + // data_buffer_size = 16384; + // data_buffer_size -= (data_buffer_size % 1024); // Align to 1K boundary data_buffer_count = g_config.dma_buffer_count; - data_buffer_size = g_config.dma_buffer_size; + data_buffer_size = g_config.dma_buffer_size; - data_buffer_size_to_host = data_buffer_size; + data_buffer_size_to_host = data_buffer_size; data_buffer_size_from_host = data_buffer_size; - g_vendor_req_buff_size = USB3_VREQ_BUF_SIZE; // Max 512 - num_packets_per_burst = USB3_PACKETS_PER_BURST; // 8 + g_vendor_req_buff_size = USB3_VREQ_BUF_SIZE; // Max 512 + num_packets_per_burst = USB3_PACKETS_PER_BURST; // 8 break; case CY_U3P_NOT_CONNECTED: @@ -1197,23 +1243,27 @@ void b200_fw_start(void) { return; } - msg("[DMA] to host: %d, from host: %d, depth: %d, burst size: %d", data_buffer_size_to_host, data_buffer_size_from_host, data_buffer_count, num_packets_per_burst); + msg("[DMA] to host: %d, from host: %d, depth: %d, burst size: %d", + data_buffer_size_to_host, + data_buffer_size_from_host, + data_buffer_count, + num_packets_per_burst); #ifdef ENABLE_MANUAL_DMA_XFER msg("[DMA] Callback enabled"); -#ifdef ENABLE_P2U_SUSP_EOP +# ifdef ENABLE_P2U_SUSP_EOP msg("[DMA] P2U_SUSP_EOP enabled"); -#endif // ENABLE_P2U_SUSP_EOP -#ifdef ENABLE_MANUAL_DMA_XFER_FROM_HOST +# endif // ENABLE_P2U_SUSP_EOP +# ifdef ENABLE_MANUAL_DMA_XFER_FROM_HOST msg("[DMA] Manual transfers from host"); -#endif // ENABLE_MANUAL_DMA_XFER_FROM_HOST -#ifdef ENABLE_MANUAL_DMA_XFER_TO_HOST +# endif // ENABLE_MANUAL_DMA_XFER_FROM_HOST +# ifdef ENABLE_MANUAL_DMA_XFER_TO_HOST msg("[DMA] Manual transfers to host"); -#endif // ENABLE_MANUAL_DMA_XFER_TO_HOST -#ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG +# endif // ENABLE_MANUAL_DMA_XFER_TO_HOST +# ifdef ENABLE_DMA_BUFFER_PACKET_DEBUG msg("[DMA] Packet debugging enabled"); -#endif // ENABLE_DMA_BUFFER_PACKET_DEBUG +# endif // ENABLE_DMA_BUFFER_PACKET_DEBUG #else msg("[DMA] AUTO transfer mode"); @@ -1226,8 +1276,7 @@ void b200_fw_start(void) { *************************************************************************/ /* Wipe out any old config. */ - CyU3PMemSet((uint8_t *) &usb_endpoint_config, 0, \ - sizeof(usb_endpoint_config)); + CyU3PMemSet((uint8_t*)&usb_endpoint_config, 0, sizeof(usb_endpoint_config)); /* This is the configuration for the USB Producer and Consumer endpoints. * @@ -1240,10 +1289,10 @@ void b200_fw_start(void) { * 'BULK OUT' endpoint. * * Note that this is opposite of what you might expect!. */ - usb_endpoint_config.enable = CyTrue; - usb_endpoint_config.epType = CY_U3P_USB_EP_BULK; + usb_endpoint_config.enable = CyTrue; + usb_endpoint_config.epType = CY_U3P_USB_EP_BULK; usb_endpoint_config.burstLen = num_packets_per_burst; - usb_endpoint_config.streams = 0; + usb_endpoint_config.streams = 0; usb_endpoint_config.pcktSize = max_packet_size; /* Configure the endpoints that we are using for slave FIFO transfers. */ @@ -1252,87 +1301,82 @@ void b200_fw_start(void) { /* Create a DMA AUTO channel for U2P transfer. * DMA size is set based on the USB speed. */ - //dma_channel_config.size = data_buffer_size; - dma_channel_config.size = data_buffer_size_from_host; - dma_channel_config.count = data_buffer_count; + // dma_channel_config.size = data_buffer_size; + dma_channel_config.size = data_buffer_size_from_host; + dma_channel_config.count = data_buffer_count; dma_channel_config.prodSckId = PRODUCER_DATA_SOCKET; dma_channel_config.consSckId = DATA_TX_PPORT_SOCKET; - dma_channel_config.dmaMode = CY_U3P_DMA_MODE_BYTE; - dma_channel_config.notification = 0 | + dma_channel_config.dmaMode = CY_U3P_DMA_MODE_BYTE; + dma_channel_config.notification = + 0 | #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_MANUAL_DMA_XFER_FROM_HOST) -CY_U3P_DMA_CB_XFER_CPLT | -CY_U3P_DMA_CB_SEND_CPLT | -CY_U3P_DMA_CB_RECV_CPLT | -CY_U3P_DMA_CB_PROD_EVENT | -CY_U3P_DMA_CB_CONS_EVENT | -CY_U3P_DMA_CB_ABORTED | -CY_U3P_DMA_CB_ERROR | -CY_U3P_DMA_CB_PROD_SUSP | -CY_U3P_DMA_CB_CONS_SUSP | + CY_U3P_DMA_CB_XFER_CPLT | CY_U3P_DMA_CB_SEND_CPLT | CY_U3P_DMA_CB_RECV_CPLT + | CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT | CY_U3P_DMA_CB_ABORTED + | CY_U3P_DMA_CB_ERROR | CY_U3P_DMA_CB_PROD_SUSP | CY_U3P_DMA_CB_CONS_SUSP | #endif // ENABLE_MANUAL_DMA_XFER - 0; - //if (g_config.manual_dma == 0) - // dma_channel_config.notification = 0; // Force all off is manual is disabled + 0; + // if (g_config.manual_dma == 0) + // dma_channel_config.notification = 0; // Force all off is manual is disabled dma_channel_config.cb = #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_MANUAL_DMA_XFER_FROM_HOST) - from_host_dma_callback; + from_host_dma_callback; #else - NULL; + NULL; #endif // ENABLE_MANUAL_DMA_XFER - dma_channel_config.prodHeader = 0; - dma_channel_config.prodFooter = 0; - dma_channel_config.consHeader = 0; + dma_channel_config.prodHeader = 0; + dma_channel_config.prodFooter = 0; + dma_channel_config.consHeader = 0; dma_channel_config.prodAvailCount = 0; - CyU3PDmaChannelCreate (&data_cons_to_prod_chan_handle, + CyU3PDmaChannelCreate(&data_cons_to_prod_chan_handle, #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_MANUAL_DMA_XFER_FROM_HOST) - (g_config.manual_dma ? /*CY_U3P_DMA_TYPE_AUTO_SIGNAL*/CY_U3P_DMA_TYPE_MANUAL : CY_U3P_DMA_TYPE_AUTO), + (g_config.manual_dma ? /*CY_U3P_DMA_TYPE_AUTO_SIGNAL*/ CY_U3P_DMA_TYPE_MANUAL + : CY_U3P_DMA_TYPE_AUTO), #else - CY_U3P_DMA_TYPE_AUTO, + CY_U3P_DMA_TYPE_AUTO, #endif // ENABLE_MANUAL_DMA_XFER - &dma_channel_config); + &dma_channel_config); // By default these will adopt 'usb_endpoint_config.pcktSize' - //CyU3PSetEpPacketSize(DATA_ENDPOINT_PRODUCER, 16384); - //CyU3PSetEpPacketSize(DATA_ENDPOINT_CONSUMER, 16384); + // CyU3PSetEpPacketSize(DATA_ENDPOINT_PRODUCER, 16384); + // CyU3PSetEpPacketSize(DATA_ENDPOINT_CONSUMER, 16384); /* Create a DMA AUTO channel for P2U transfer. */ - dma_channel_config.size = data_buffer_size_to_host; + dma_channel_config.size = data_buffer_size_to_host; dma_channel_config.prodSckId = DATA_RX_PPORT_SOCKET; dma_channel_config.consSckId = CONSUMER_DATA_SOCKET; - dma_channel_config.notification = 0 | + dma_channel_config.notification = + 0 | #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_MANUAL_DMA_XFER_TO_HOST) -CY_U3P_DMA_CB_XFER_CPLT | -CY_U3P_DMA_CB_SEND_CPLT | -CY_U3P_DMA_CB_RECV_CPLT | -CY_U3P_DMA_CB_PROD_EVENT | -CY_U3P_DMA_CB_CONS_EVENT | -CY_U3P_DMA_CB_ABORTED | -CY_U3P_DMA_CB_ERROR | -CY_U3P_DMA_CB_PROD_SUSP | -CY_U3P_DMA_CB_CONS_SUSP | + CY_U3P_DMA_CB_XFER_CPLT | CY_U3P_DMA_CB_SEND_CPLT | CY_U3P_DMA_CB_RECV_CPLT + | CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT | CY_U3P_DMA_CB_ABORTED + | CY_U3P_DMA_CB_ERROR | CY_U3P_DMA_CB_PROD_SUSP | CY_U3P_DMA_CB_CONS_SUSP | #endif // ENABLE_MANUAL_DMA_XFER #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_P2U_SUSP_EOP) -CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below + CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below #endif // ENABLE_P2U_SUSP_EOP - 0; - //if (g_config.manual_dma == 0) - // dma_channel_config.notification = 0; // Force all off is manual is disabled + 0; + // if (g_config.manual_dma == 0) + // dma_channel_config.notification = 0; // Force all off is manual is disabled dma_channel_config.cb = -#if defined(ENABLE_MANUAL_DMA_XFER) && (defined(ENABLE_MANUAL_DMA_XFER_TO_HOST) || defined(ENABLE_P2U_SUSP_EOP)) - to_host_dma_callback; +#if defined(ENABLE_MANUAL_DMA_XFER) \ + && (defined(ENABLE_MANUAL_DMA_XFER_TO_HOST) || defined(ENABLE_P2U_SUSP_EOP)) + to_host_dma_callback; #else - NULL; + NULL; #endif // ENABLE_MANUAL_DMA_XFER - CyU3PDmaChannelCreate (&data_prod_to_cons_chan_handle, + CyU3PDmaChannelCreate(&data_prod_to_cons_chan_handle, #if defined(ENABLE_MANUAL_DMA_XFER) && defined(ENABLE_MANUAL_DMA_XFER_TO_HOST) - (g_config.manual_dma ? /*CY_U3P_DMA_TYPE_AUTO_SIGNAL*/CY_U3P_DMA_TYPE_MANUAL : CY_U3P_DMA_TYPE_AUTO), + (g_config.manual_dma ? /*CY_U3P_DMA_TYPE_AUTO_SIGNAL*/ CY_U3P_DMA_TYPE_MANUAL + : CY_U3P_DMA_TYPE_AUTO), #else - CY_U3P_DMA_TYPE_AUTO, + CY_U3P_DMA_TYPE_AUTO, #endif // ENABLE_MANUAL_DMA_XFER - &dma_channel_config); + &dma_channel_config); #ifdef ENABLE_P2U_SUSP_EOP - CyU3PDmaChannelSetSuspend(&data_prod_to_cons_chan_handle, CY_U3P_DMA_SCK_SUSP_NONE, CY_U3P_DMA_SCK_SUSP_EOP); + CyU3PDmaChannelSetSuspend(&data_prod_to_cons_chan_handle, + CY_U3P_DMA_SCK_SUSP_NONE, + CY_U3P_DMA_SCK_SUSP_EOP); #endif // ENABLE_P2U_SUSP_EOP /* Flush the Endpoint memory */ CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); @@ -1348,8 +1392,7 @@ CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below *************************************************************************/ /* Wipe out any old config. */ - CyU3PMemSet((uint8_t *) &usb_endpoint_config, 0, \ - sizeof(usb_endpoint_config)); + CyU3PMemSet((uint8_t*)&usb_endpoint_config, 0, sizeof(usb_endpoint_config)); /* This is the configuration for the USB Producer and Consumer endpoints. * @@ -1362,10 +1405,10 @@ CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below * 'BULK OUT' endpoint. * * Note that this is opposite of what you might expect!. */ - usb_endpoint_config.enable = CyTrue; - usb_endpoint_config.epType = CY_U3P_USB_EP_BULK; + usb_endpoint_config.enable = CyTrue; + usb_endpoint_config.epType = CY_U3P_USB_EP_BULK; usb_endpoint_config.burstLen = num_packets_per_burst; - usb_endpoint_config.streams = 0; + usb_endpoint_config.streams = 0; usb_endpoint_config.pcktSize = max_packet_size; /* Configure the endpoints that we are using for slave FIFO transfers. */ @@ -1374,27 +1417,27 @@ CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below /* Create a DMA AUTO channel for U2P transfer. * DMA size is set based on the USB speed. */ - dma_channel_config.size = max_packet_size; - dma_channel_config.count = 2; - dma_channel_config.prodSckId = PRODUCER_CTRL_SOCKET; - dma_channel_config.consSckId = CTRL_COMM_PPORT_SOCKET; - dma_channel_config.dmaMode = CY_U3P_DMA_MODE_BYTE; - dma_channel_config.notification = 0; - dma_channel_config.cb = NULL; - dma_channel_config.prodHeader = 0; - dma_channel_config.prodFooter = 0; - dma_channel_config.consHeader = 0; + dma_channel_config.size = max_packet_size; + dma_channel_config.count = 2; + dma_channel_config.prodSckId = PRODUCER_CTRL_SOCKET; + dma_channel_config.consSckId = CTRL_COMM_PPORT_SOCKET; + dma_channel_config.dmaMode = CY_U3P_DMA_MODE_BYTE; + dma_channel_config.notification = 0; + dma_channel_config.cb = NULL; + dma_channel_config.prodHeader = 0; + dma_channel_config.prodFooter = 0; + dma_channel_config.consHeader = 0; dma_channel_config.prodAvailCount = 0; - CyU3PDmaChannelCreate (&ctrl_cons_to_prod_chan_handle, - CY_U3P_DMA_TYPE_AUTO, &dma_channel_config); + CyU3PDmaChannelCreate( + &ctrl_cons_to_prod_chan_handle, CY_U3P_DMA_TYPE_AUTO, &dma_channel_config); /* Create a DMA AUTO channel for P2U transfer. */ dma_channel_config.prodSckId = CTRL_RESP_PPORT_SOCKET; dma_channel_config.consSckId = CONSUMER_CTRL_SOCKET; - dma_channel_config.cb = NULL; - CyU3PDmaChannelCreate (&ctrl_prod_to_cons_chan_handle, - CY_U3P_DMA_TYPE_AUTO, &dma_channel_config); + dma_channel_config.cb = NULL; + CyU3PDmaChannelCreate( + &ctrl_prod_to_cons_chan_handle, CY_U3P_DMA_TYPE_AUTO, &dma_channel_config); /* Flush the Endpoint memory */ CyU3PUsbFlushEp(CTRL_ENDPOINT_PRODUCER); @@ -1404,7 +1447,8 @@ CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below CyU3PDmaChannelSetXfer(&ctrl_cons_to_prod_chan_handle, DMA_SIZE_INFINITE); CyU3PDmaChannelSetXfer(&ctrl_prod_to_cons_chan_handle, DMA_SIZE_INFINITE); - //CyU3PUsbEnableEPPrefetch(); // To address USB_EVENT_EP_UNDERRUN on EP 0x86 (didn't fix it though) + // CyU3PUsbEnableEPPrefetch(); // To address USB_EVENT_EP_UNDERRUN on EP 0x86 + // (didn't fix it though) /* Update the application status flag. */ g_app_running = CyTrue; @@ -1417,12 +1461,14 @@ CY_U3P_DMA_CB_CONS_SUSP | // For 'CyU3PDmaChannelSetSuspend' below * * We are _not_ handling SUSPEND or CONNECT. */ -void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { - - switch(event_type) { +void event_usb_callback(CyU3PUsbEventType_t event_type, uint16_t event_data) +{ + switch (event_type) { case CY_U3P_USB_EVENT_SETCONF: - msg("USB_EVENT_SETCONF (#%d)", event_data); //evData provides the configuration number that is selected by the host. - if(g_app_running) { + msg("USB_EVENT_SETCONF (#%d)", + event_data); // evData provides the configuration number that is selected + // by the host. + if (g_app_running) { b200_fw_stop(); } @@ -1435,7 +1481,7 @@ void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { msg("USB_EVENT_RESET"); else msg("USB_EVENT_DISCONNECT"); - if(g_app_running) { + if (g_app_running) { b200_fw_stop(); } break; @@ -1448,9 +1494,10 @@ void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { msg("USB_EVENT_SUSPEND"); break; - case CY_U3P_USB_EVENT_RESUME: // Known issue: this is called repeatedly after a resume - //msg("USB_EVENT_RESUME"); - g_counters.resume_count++; // Not locked + case CY_U3P_USB_EVENT_RESUME: // Known issue: this is called repeatedly after a + // resume + // msg("USB_EVENT_RESUME"); + g_counters.resume_count++; // Not locked break; case CY_U3P_USB_EVENT_SPEED: @@ -1465,12 +1512,13 @@ void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { msg("USB_EVENT_SET_SEL"); break; - case CY_U3P_USB_EVENT_SOF_ITP: // CyU3PUsbEnableITPEvent - //msg("USB_EVENT_SOF_ITP"); + case CY_U3P_USB_EVENT_SOF_ITP: // CyU3PUsbEnableITPEvent + // msg("USB_EVENT_SOF_ITP"); break; case CY_U3P_USB_EVENT_EP0_STAT_CPLT: - //msg("USB_EVENT_EP0_STAT_CPLT"); // Occurs each time there's a control transfer + // msg("USB_EVENT_EP0_STAT_CPLT"); // Occurs each time there's a control + // transfer break; case CY_U3P_USB_EVENT_VBUS_VALID: @@ -1501,7 +1549,8 @@ void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { msg("USB_EVENT_OTG_SRP"); break; - case CY_U3P_USB_EVENT_EP_UNDERRUN: // See SDK 1.3 known issues 17 if this happens (can probably ignore first logged occurence) + case CY_U3P_USB_EVENT_EP_UNDERRUN: // See SDK 1.3 known issues 17 if this happens + // (can probably ignore first logged occurence) LOCK(g_counters_lock); ++g_counters.usb_ep_underrun_count; UNLOCK(g_counters_lock); @@ -1543,7 +1592,8 @@ void event_usb_callback (CyU3PUsbEventType_t event_type, uint16_t event_data) { * This function is also responsible for receiving vendor requests, and triggering * the appropriate RTOS event to wake up the vendor request handler thread. */ -CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { +CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) +{ STATIC_SAVER uint8_t bRequestType, bRequest, bType, bTarget, i2cAddr; STATIC_SAVER uint16_t wValue, wIndex, wLength; @@ -1551,22 +1601,22 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { /* Decode the fields from the setup request. */ bRequestType = (uint8_t)(data0 & CY_U3P_USB_REQUEST_TYPE_MASK); - bType = (uint8_t)(bRequestType & CY_U3P_USB_TYPE_MASK); - bTarget = (uint8_t)(bRequestType & CY_U3P_USB_TARGET_MASK); - bRequest = (uint8_t)((data0 & CY_U3P_USB_REQUEST_MASK) >> CY_U3P_USB_REQUEST_POS); - wValue = (uint16_t)((data0 & CY_U3P_USB_VALUE_MASK) >> CY_U3P_USB_VALUE_POS); - wIndex = (uint16_t)((data1 & CY_U3P_USB_INDEX_MASK) >> CY_U3P_USB_INDEX_POS); - wLength = (uint16_t)((data1 & CY_U3P_USB_LENGTH_MASK) >> CY_U3P_USB_LENGTH_POS); + bType = (uint8_t)(bRequestType & CY_U3P_USB_TYPE_MASK); + bTarget = (uint8_t)(bRequestType & CY_U3P_USB_TARGET_MASK); + bRequest = (uint8_t)((data0 & CY_U3P_USB_REQUEST_MASK) >> CY_U3P_USB_REQUEST_POS); + wValue = (uint16_t)((data0 & CY_U3P_USB_VALUE_MASK) >> CY_U3P_USB_VALUE_POS); + wIndex = (uint16_t)((data1 & CY_U3P_USB_INDEX_MASK) >> CY_U3P_USB_INDEX_POS); + wLength = (uint16_t)((data1 & CY_U3P_USB_LENGTH_MASK) >> CY_U3P_USB_LENGTH_POS); - if(bType == CY_U3P_USB_STANDARD_RQT) { + if (bType == CY_U3P_USB_STANDARD_RQT) { /* Handle SET_FEATURE(FUNCTION_SUSPEND) and CLEAR_FEATURE(FUNCTION_SUSPEND) * requests here. It should be allowed to pass if the device is in configured * state and failed otherwise. */ - if((bTarget == CY_U3P_USB_TARGET_INTF) \ - && ((bRequest == CY_U3P_USB_SC_SET_FEATURE) \ - || (bRequest == CY_U3P_USB_SC_CLEAR_FEATURE)) && (wValue == 0)) { - - if(g_app_running) { + if ((bTarget == CY_U3P_USB_TARGET_INTF) + && ((bRequest == CY_U3P_USB_SC_SET_FEATURE) + || (bRequest == CY_U3P_USB_SC_CLEAR_FEATURE)) + && (wValue == 0)) { + if (g_app_running) { CyU3PUsbAckSetup(); msg("ACK set/clear"); } else { @@ -1578,18 +1628,17 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } /* Handle Microsoft OS String Descriptor request. */ - if((bTarget == CY_U3P_USB_TARGET_DEVICE) \ - && (bRequest == CY_U3P_USB_SC_GET_DESCRIPTOR) \ - && (wValue == ((CY_U3P_USB_STRING_DESCR << 8) | 0xEE))) { + if ((bTarget == CY_U3P_USB_TARGET_DEVICE) + && (bRequest == CY_U3P_USB_SC_GET_DESCRIPTOR) + && (wValue == ((CY_U3P_USB_STRING_DESCR << 8) | 0xEE))) { /* Make sure we do not send more data than requested. */ - const uint8_t* product_desc = get_product_string_descriptor( - get_pid(&eeprom_read)); - if (wLength > product_desc[0]) - { + const uint8_t* product_desc = + get_product_string_descriptor(get_pid(&eeprom_read)); + if (wLength > product_desc[0]) { wLength = product_desc[0]; } - //msg("MS string desc"); + // msg("MS string desc"); CyU3PUsbSendEP0Data(wLength, ((uint8_t*)product_desc)); handled = CyTrue; @@ -1602,19 +1651,19 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { * level protocol. So flush the EP memory and reset the DMA channel associated * with it. If there are more than one EP associated with the channel reset both * the EPs. The endpoint stall and toggle / sequence number is also expected to be - * reset. Return CyFalse to make the library clear the stall and reset the endpoint - * toggle. Or invoke the CyU3PUsbStall (ep, CyFalse, CyTrue) and return CyTrue. - * Here we are clearing the stall. */ - if((bTarget == CY_U3P_USB_TARGET_ENDPT) \ - && (bRequest == CY_U3P_USB_SC_CLEAR_FEATURE) - && (wValue == CY_U3P_USBX_FS_EP_HALT)) { - if(g_app_running) { - if(wIndex == DATA_ENDPOINT_PRODUCER) { + * reset. Return CyFalse to make the library clear the stall and reset the + * endpoint toggle. Or invoke the CyU3PUsbStall (ep, CyFalse, CyTrue) and return + * CyTrue. Here we are clearing the stall. */ + if ((bTarget == CY_U3P_USB_TARGET_ENDPT) + && (bRequest == CY_U3P_USB_SC_CLEAR_FEATURE) + && (wValue == CY_U3P_USBX_FS_EP_HALT)) { + if (g_app_running) { + if (wIndex == DATA_ENDPOINT_PRODUCER) { CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); CyU3PUsbResetEp(DATA_ENDPOINT_PRODUCER); - CyU3PDmaChannelSetXfer(&data_cons_to_prod_chan_handle, \ - DMA_SIZE_INFINITE); + CyU3PDmaChannelSetXfer( + &data_cons_to_prod_chan_handle, DMA_SIZE_INFINITE); CyU3PUsbStall(wIndex, CyFalse, CyTrue); handled = CyTrue; CyU3PUsbAckSetup(); @@ -1622,12 +1671,12 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { msg("Clear DATA_ENDPOINT_PRODUCER"); } - if(wIndex == DATA_ENDPOINT_CONSUMER) { + if (wIndex == DATA_ENDPOINT_CONSUMER) { CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle); CyU3PUsbFlushEp(DATA_ENDPOINT_CONSUMER); CyU3PUsbResetEp(DATA_ENDPOINT_CONSUMER); - CyU3PDmaChannelSetXfer(&data_prod_to_cons_chan_handle, \ - DMA_SIZE_INFINITE); + CyU3PDmaChannelSetXfer( + &data_prod_to_cons_chan_handle, DMA_SIZE_INFINITE); CyU3PUsbStall(wIndex, CyFalse, CyTrue); handled = CyTrue; CyU3PUsbAckSetup(); @@ -1635,12 +1684,12 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { msg("Clear DATA_ENDPOINT_CONSUMER"); } - if(wIndex == CTRL_ENDPOINT_PRODUCER) { + if (wIndex == CTRL_ENDPOINT_PRODUCER) { CyU3PDmaChannelReset(&ctrl_cons_to_prod_chan_handle); CyU3PUsbFlushEp(CTRL_ENDPOINT_PRODUCER); CyU3PUsbResetEp(CTRL_ENDPOINT_PRODUCER); - CyU3PDmaChannelSetXfer(&ctrl_cons_to_prod_chan_handle, \ - DMA_SIZE_INFINITE); + CyU3PDmaChannelSetXfer( + &ctrl_cons_to_prod_chan_handle, DMA_SIZE_INFINITE); CyU3PUsbStall(wIndex, CyFalse, CyTrue); handled = CyTrue; CyU3PUsbAckSetup(); @@ -1648,12 +1697,12 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { msg("Clear CTRL_ENDPOINT_PRODUCER"); } - if(wIndex == CTRL_ENDPOINT_CONSUMER) { + if (wIndex == CTRL_ENDPOINT_CONSUMER) { CyU3PDmaChannelReset(&ctrl_prod_to_cons_chan_handle); CyU3PUsbFlushEp(CTRL_ENDPOINT_CONSUMER); CyU3PUsbResetEp(CTRL_ENDPOINT_CONSUMER); - CyU3PDmaChannelSetXfer(&ctrl_prod_to_cons_chan_handle, \ - DMA_SIZE_INFINITE); + CyU3PDmaChannelSetXfer( + &ctrl_prod_to_cons_chan_handle, DMA_SIZE_INFINITE); CyU3PUsbStall(wIndex, CyFalse, CyTrue); handled = CyTrue; CyU3PUsbAckSetup(); @@ -1665,45 +1714,47 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } /* This must be & and not == so that we catch VREQs that are both 'IN' and * 'OUT' in direction. */ - else if(bRequestType & CY_U3P_USB_VENDOR_RQT) { - - handled = CyTrue; + else if (bRequestType & CY_U3P_USB_VENDOR_RQT) { + handled = CyTrue; uint16_t read_count = 0; - switch(bRequest) { + switch (bRequest) { case B200_VREQ_BITSTREAM_START: { CyU3PUsbGetEP0Data(1, g_vendor_req_buffer, &read_count); g_fpga_programming_write_count = 0; - CyU3PEventSet(&g_event_usb_config, EVENT_BITSTREAM_START, \ - CYU3P_EVENT_OR); + CyU3PEventSet(&g_event_usb_config, EVENT_BITSTREAM_START, CYU3P_EVENT_OR); break; } case B200_VREQ_BITSTREAM_DATA: { - CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, \ - &read_count); + CyU3PUsbGetEP0Data( + g_vendor_req_buff_size, g_vendor_req_buffer, &read_count); if (g_fx3_state == STATE_CONFIGURING_FPGA) { ++g_fpga_programming_write_count; CyU3PSpiTransmitWords(g_vendor_req_buffer, read_count); - CyU3PThreadSleep(1); // Newer controllers don't have an issue when this short sleep here + CyU3PThreadSleep(1); // Newer controllers don't have an issue when + // this short sleep here } break; } case B200_VREQ_BITSTREAM_DATA_FILL: { - CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, &g_vendor_req_read_count); + CyU3PUsbGetEP0Data(g_vendor_req_buff_size, + g_vendor_req_buffer, + &g_vendor_req_read_count); break; } case B200_VREQ_BITSTREAM_DATA_COMMIT: { - /*CyU3PReturnStatus_t*/int spi_result = -1; + /*CyU3PReturnStatus_t*/ int spi_result = -1; if (g_fx3_state == STATE_CONFIGURING_FPGA) { ++g_fpga_programming_write_count; - spi_result = CyU3PSpiTransmitWords(g_vendor_req_buffer, g_vendor_req_read_count); - CyU3PThreadSleep(1); // 20 MHz, 512 bytes + spi_result = CyU3PSpiTransmitWords( + g_vendor_req_buffer, g_vendor_req_read_count); + CyU3PThreadSleep(1); // 20 MHz, 512 bytes } CyU3PUsbSendEP0Data(sizeof(spi_result), (uint8_t*)&spi_result); break; @@ -1717,7 +1768,7 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_GET_COMPAT: { - CyU3PUsbSendEP0Data(/*2*/sizeof(compat_num), compat_num); + CyU3PUsbSendEP0Data(/*2*/ sizeof(compat_num), compat_num); break; } @@ -1727,7 +1778,7 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_GET_FPGA_HASH: { - CyU3PUsbSendEP0Data(/*4*/sizeof(fpga_hash), fpga_hash); + CyU3PUsbSendEP0Data(/*4*/ sizeof(fpga_hash), fpga_hash); break; } @@ -1737,7 +1788,7 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_GET_FW_HASH: { - CyU3PUsbSendEP0Data(/*4*/sizeof(fw_hash), fw_hash); + CyU3PUsbSendEP0Data(/*4*/ sizeof(fw_hash), fw_hash); break; } @@ -1752,28 +1803,30 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { if (log_buffer_len == 0) { log_buffer[0] = '\0'; CyU3PUsbSendEP0Data(1, (uint8_t*)log_buffer); - //CyU3PUsbSendEP0Data(0, NULL); - //CyU3PUsbAckSetup(); - } - else if (log_buffer_idx == 0) + // CyU3PUsbSendEP0Data(0, NULL); + // CyU3PUsbAckSetup(); + } else if (log_buffer_idx == 0) CyU3PUsbSendEP0Data(log_buffer_len, (uint8_t*)log_buffer); else { int len1 = min(LOG_BUFFER_SIZE - log_buffer_idx, log_buffer_len); memcpy(log_contiguous_buffer, log_buffer + log_buffer_idx, len1); - //if ((log_buffer_idx + log_buffer_len) > LOG_BUFFER_SIZE) + // if ((log_buffer_idx + log_buffer_len) > LOG_BUFFER_SIZE) if (len1 < log_buffer_len) - memcpy(log_contiguous_buffer + len1, log_buffer, log_buffer_len - len1); + memcpy(log_contiguous_buffer + len1, + log_buffer, + log_buffer_len - len1); CyU3PUsbSendEP0Data(log_buffer_len, (uint8_t*)log_contiguous_buffer); } // FIXME: Necessary? Not used in the other ones - //CyU3PUsbSendEP0Data(0, NULL); // Send ZLP since previous send has resulted in an integral # of packets + // CyU3PUsbSendEP0Data(0, NULL); // Send ZLP since previous send has + // resulted in an integral # of packets log_reset(); UNLOCK(g_log_lock); - //log_reset(); + // log_reset(); break; } @@ -1787,14 +1840,15 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { UNLOCK(g_counters_lock); - //counters_auto_reset(); + // counters_auto_reset(); break; } case B200_VREQ_CLEAR_COUNTERS: { CyU3PUsbAckSetup(); - //CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, &read_count); // Dummy + // CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, + // &read_count); // Dummy counters_dma_reset(); @@ -1802,48 +1856,54 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_GET_USB_EVENT_LOG: { - uint16_t idx = CyU3PUsbGetEventLogIndex(); // Current *write* pointer - if (idx > (USB_EVENT_LOG_SIZE-1)) { + uint16_t idx = CyU3PUsbGetEventLogIndex(); // Current *write* pointer + if (idx > (USB_EVENT_LOG_SIZE - 1)) { msg("! USB event log idx = %i", (int)idx); break; } - // Assuming logging won't wrap around between get calls (i.e. buffer should be long enough) + // Assuming logging won't wrap around between get calls (i.e. buffer + // should be long enough) uint16_t len = 0; if (idx < g_last_usb_event_log_index) { uint16_t len1 = (USB_EVENT_LOG_SIZE - g_last_usb_event_log_index); - if (len1 > (USB_EVENT_LOG_SIZE-1)) { + if (len1 > (USB_EVENT_LOG_SIZE - 1)) { msg("! USB event log len 2.1 = %i", (int)len1); break; } len = len1 + idx; - if (len > (USB_EVENT_LOG_SIZE-1)) { + if (len > (USB_EVENT_LOG_SIZE - 1)) { msg("! USB event log len 2.2 = %i", (int)len); break; } - memcpy(g_usb_event_log_contiguous_buf, g_usb_event_log + g_last_usb_event_log_index, len1); + memcpy(g_usb_event_log_contiguous_buf, + g_usb_event_log + g_last_usb_event_log_index, + len1); memcpy(g_usb_event_log_contiguous_buf + len1, g_usb_event_log, idx); - //msg("USB event log [2] %i %i", (int)len1, (int)len); + // msg("USB event log [2] %i %i", (int)len1, (int)len); } else { len = idx - g_last_usb_event_log_index; - if (len > (USB_EVENT_LOG_SIZE-1)) { + if (len > (USB_EVENT_LOG_SIZE - 1)) { msg("! USB event log len 1 = %i", (int)len); break; } - if (len > 0) { // ZLP should be OK - memcpy(g_usb_event_log_contiguous_buf, g_usb_event_log + g_last_usb_event_log_index, len); - //msg("USB event log [1] %i", (int)len); + if (len > 0) { // ZLP should be OK + memcpy(g_usb_event_log_contiguous_buf, + g_usb_event_log + g_last_usb_event_log_index, + len); + // msg("USB event log [1] %i", (int)len); } } - //if (len > 0) // Send a ZLP, otherwise it'll timeout - CyU3PUsbSendEP0Data(len, g_usb_event_log_contiguous_buf); + // if (len > 0) // Send a ZLP, otherwise it'll timeout + CyU3PUsbSendEP0Data(len, g_usb_event_log_contiguous_buf); g_last_usb_event_log_index = idx; break; } case B200_VREQ_SET_CONFIG: { - CyU3PUsbGetEP0Data(sizeof(CONFIG_MOD), (uint8_t*)g_vendor_req_buffer, &read_count); + CyU3PUsbGetEP0Data( + sizeof(CONFIG_MOD), (uint8_t*)g_vendor_req_buffer, &read_count); if (read_count == sizeof(CONFIG_MOD)) { memcpy(&g_config_mod, g_vendor_req_buffer, sizeof(CONFIG_MOD)); CyU3PEventSet(&g_event_usb_config, EVENT_RE_ENUM, CYU3P_EVENT_OR); @@ -1857,7 +1917,8 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_WRITE_SB: { - CyU3PUsbGetEP0Data(g_vendor_req_buff_size, (uint8_t*)g_vendor_req_buffer, &read_count); + CyU3PUsbGetEP0Data( + g_vendor_req_buff_size, (uint8_t*)g_vendor_req_buffer, &read_count); #ifdef ENABLE_FPGA_SB uint16_t i; LOCK(g_suart_lock); @@ -1882,53 +1943,55 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { sb_write(SUART_CLKDIV, div); UNLOCK(g_suart_lock); msg("SUART_CLKDIV = %d", div); - /*g_fpga_sb_uart_div*/g_config.sb_baud_div = div; // Store for GPIF (FPGA) reset + /*g_fpga_sb_uart_div*/ g_config.sb_baud_div = + div; // Store for GPIF (FPGA) reset #else msg("SB is disabled"); #endif // ENABLE_FPGA_SB - } - else + } else msg("! SUART_CLKDIV received %d bytes", read_count); break; } case B200_VREQ_FLUSH_DATA_EPS: { - //msg("Flushing data EPs..."); + // msg("Flushing data EPs..."); - //CyU3PUsbAckSetup(); + // CyU3PUsbAckSetup(); - //CyU3PUsbResetEndpointMemories(); + // CyU3PUsbResetEndpointMemories(); // From host - //CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); - //CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); - //CyU3PUsbResetEp(DATA_ENDPOINT_PRODUCER); - //CyU3PDmaChannelSetXfer(&data_cons_to_prod_chan_handle, DMA_SIZE_INFINITE); + // CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); + // CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); + // CyU3PUsbResetEp(DATA_ENDPOINT_PRODUCER); + // CyU3PDmaChannelSetXfer(&data_cons_to_prod_chan_handle, + // DMA_SIZE_INFINITE); - //CyU3PDmaSocketDisable(DATA_RX_PPORT_SOCKET); + // CyU3PDmaSocketDisable(DATA_RX_PPORT_SOCKET); - //CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); - if (CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle) != CY_U3P_SUCCESS) - { + // CyU3PDmaChannelReset(&data_cons_to_prod_chan_handle); + if (CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle) + != CY_U3P_SUCCESS) { msg("! CyU3PDmaChannelReset"); } - //CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); + // CyU3PUsbFlushEp(DATA_ENDPOINT_PRODUCER); CyU3PUsbFlushEp(DATA_ENDPOINT_CONSUMER); - //CyU3PUsbResetEp(DATA_ENDPOINT_PRODUCER); -// CyU3PUsbResetEp(DATA_ENDPOINT_CONSUMER); - //CyU3PUsbStall(DATA_ENDPOINT_CONSUMER, CyFalse, CyTrue); - //CyU3PDmaChannelSetXfer(&data_cons_to_prod_chan_handle, DMA_SIZE_INFINITE); - //CyU3PDmaSocketEnable(DATA_RX_PPORT_SOCKET); + // CyU3PUsbResetEp(DATA_ENDPOINT_PRODUCER); + // CyU3PUsbResetEp(DATA_ENDPOINT_CONSUMER); + // CyU3PUsbStall(DATA_ENDPOINT_CONSUMER, CyFalse, CyTrue); + // CyU3PDmaChannelSetXfer(&data_cons_to_prod_chan_handle, + // DMA_SIZE_INFINITE); CyU3PDmaSocketEnable(DATA_RX_PPORT_SOCKET); CyU3PDmaChannelSetXfer(&data_prod_to_cons_chan_handle, DMA_SIZE_INFINITE); - //CyU3PUsbResetEndpointMemories(); + // CyU3PUsbResetEndpointMemories(); // To host - //CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle); - //CyU3PUsbFlushEp(DATA_ENDPOINT_CONSUMER); - //CyU3PUsbResetEp(DATA_ENDPOINT_CONSUMER); - //CyU3PDmaChannelSetXfer(&data_prod_to_cons_chan_handle, DMA_SIZE_INFINITE); + // CyU3PDmaChannelReset(&data_prod_to_cons_chan_handle); + // CyU3PUsbFlushEp(DATA_ENDPOINT_CONSUMER); + // CyU3PUsbResetEp(DATA_ENDPOINT_CONSUMER); + // CyU3PDmaChannelSetXfer(&data_prod_to_cons_chan_handle, + // DMA_SIZE_INFINITE); CyU3PUsbAckSetup(); @@ -1936,27 +1999,46 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_EEPROM_WRITE: { - i2cAddr = 0xA0 | ((wValue & 0x0007) << 1); - CyU3PUsbGetEP0Data(((wLength + 15) & 0xFFF0), g_vendor_req_buffer, NULL); + if ((wLength == 0) || (wLength > sizeof(g_vendor_req_buffer)) + || ((uint32_t)wIndex + wLength > CY_FX_USBI2C_I2C_MAX_CAPACITY)) { + msg("! EEPROM write length out of range: %d", (int)wLength); + CyU3PUsbStall(0, CyTrue, CyFalse); + break; + } - CyFxUsbI2cTransfer (wIndex, i2cAddr, wLength, - g_vendor_req_buffer, CyFalse); + i2cAddr = 0xA0 | ((wValue & 0x0007) << 1); + // Rounding up to the EP0 boundary stays in bounds because wLength is + // at most sizeof(g_vendor_req_buffer). + CyU3PUsbGetEP0Data( + ((wLength + 15) & 0xFFF0), g_vendor_req_buffer, &read_count); + + if (read_count > wLength) + read_count = wLength; + + CyFxUsbI2cTransfer( + wIndex, i2cAddr, read_count, g_vendor_req_buffer, CyFalse); break; } case B200_VREQ_EEPROM_READ: { + if ((wLength == 0) || (wLength > sizeof(g_vendor_req_buffer)) + || ((uint32_t)wIndex + wLength > CY_FX_USBI2C_I2C_MAX_CAPACITY)) { + msg("! EEPROM read length out of range: %d", (int)wLength); + CyU3PUsbStall(0, CyTrue, CyFalse); + break; + } + i2cAddr = 0xA0 | ((wValue & 0x0007) << 1); - CyU3PMemSet (g_vendor_req_buffer, 0, sizeof (g_vendor_req_buffer)); - CyFxUsbI2cTransfer (wIndex, i2cAddr, wLength, - g_vendor_req_buffer, CyTrue); + CyU3PMemSet(g_vendor_req_buffer, 0, sizeof(g_vendor_req_buffer)); + CyFxUsbI2cTransfer(wIndex, i2cAddr, wLength, g_vendor_req_buffer, CyTrue); CyU3PUsbSendEP0Data(wLength, g_vendor_req_buffer); break; } case B200_VREQ_TOGGLE_FPGA_RESET: { - CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, \ - &read_count); + CyU3PUsbGetEP0Data( + g_vendor_req_buff_size, g_vendor_req_buffer, &read_count); /* CyBool_t value = (g_vendor_req_buffer[0] & 0x01) ? CyTrue : CyFalse; CyU3PGpioSetValue(GPIO_FPGA_RESET, value); */ @@ -1964,8 +2046,8 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { } case B200_VREQ_TOGGLE_GPIF_RESET: { - CyU3PUsbGetEP0Data(g_vendor_req_buff_size, g_vendor_req_buffer, \ - &read_count); + CyU3PUsbGetEP0Data( + g_vendor_req_buff_size, g_vendor_req_buffer, &read_count); reset_gpif(); break; @@ -1974,13 +2056,15 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { case B200_VREQ_RESET_DEVICE: { CyU3PUsbGetEP0Data(4, g_vendor_req_buffer, &read_count); - CyU3PDeviceReset(CyFalse); // FIXME: If CyTrue, this will *not* call static initialisers for global variables - must do this manually + CyU3PDeviceReset( + CyFalse); // FIXME: If CyTrue, this will *not* call static + // initialisers for global variables - must do this manually break; } case B200_VREQ_GET_USB_SPEED: { CyU3PUSBSpeed_t usb_speed = CyU3PUsbGetSpeed(); - switch(usb_speed) { + switch (usb_speed) { case CY_U3P_SUPER_SPEED: g_vendor_req_buffer[0] = 3; break; @@ -2027,24 +2111,23 @@ CyBool_t usb_setup_callback(uint32_t data0, uint32_t data1) { * in the low power state. If we return CyFalse, the FX3 device immediately * tries to trigger an exit back to U0. */ -CyBool_t lpm_request_callback(CyU3PUsbLinkPowerMode link_mode) { +CyBool_t lpm_request_callback(CyU3PUsbLinkPowerMode link_mode) +{ msg("! lpm_request_callback = %i", link_mode); return -//#ifdef PREVENT_LOW_POWER_MODE - CyFalse; // This still allows my laptop to sleep -//#else -// CyTrue; -//#endif // PREVENT_LOW_POWER_MODE + // #ifdef PREVENT_LOW_POWER_MODE + CyFalse; // This still allows my laptop to sleep + // #else + // CyTrue; + // #endif // PREVENT_LOW_POWER_MODE } /* Callback function to check for PIB ERROR*/ void gpif_error_cb(CyU3PPibIntrType cbType, uint16_t cbArg) { - if (cbType==CYU3P_PIB_INTR_ERROR) - { - switch (CYU3P_GET_PIB_ERROR_TYPE(cbArg)) - { + if (cbType == CYU3P_PIB_INTR_ERROR) { + switch (CYU3P_GET_PIB_ERROR_TYPE(cbArg)) { case CYU3P_PIB_ERR_NONE: break; case CYU3P_PIB_ERR_THR0_WR_OVERRUN: @@ -2079,40 +2162,46 @@ void gpif_error_cb(CyU3PPibIntrType cbType, uint16_t cbArg) break; // FIXME: Other threads case CYU3P_PIB_ERR_THR1_SCK_INACTIVE: - //msg("CYU3P_PIB_ERR_THR1_SCK_INACTIVE"); - ++g_counters.pib_counters[1].socket_inactive; // UNSYNC'd + // msg("CYU3P_PIB_ERR_THR1_SCK_INACTIVE"); + ++g_counters.pib_counters[1].socket_inactive; // UNSYNC'd break; default: msg("Unknown CYU3P_PIB_ERR %i", CYU3P_GET_PIB_ERROR_TYPE(cbArg)); break; } - switch (CYU3P_GET_GPIF_ERROR_TYPE(cbArg)) - { - case CYU3P_GPIF_ERR_NONE: /**< No GPIF state machine errors. */ - //msg("CYU3P_GPIF_ERR_NONE"); + switch (CYU3P_GET_GPIF_ERROR_TYPE(cbArg)) { + case CYU3P_GPIF_ERR_NONE: /**< No GPIF state machine errors. */ + // msg("CYU3P_GPIF_ERR_NONE"); break; - case CYU3P_GPIF_ERR_INADDR_OVERWRITE: /**< Content of INGRESS_ADDR register is overwritten before read. */ + case CYU3P_GPIF_ERR_INADDR_OVERWRITE: /**< Content of INGRESS_ADDR register is + overwritten before read. */ msg("CYU3P_GPIF_ERR_INADDR_OVERWRITE"); break; - case CYU3P_GPIF_ERR_EGADDR_INVALID: /**< Attempt to read EGRESS_ADDR register before it is written to. */ + case CYU3P_GPIF_ERR_EGADDR_INVALID: /**< Attempt to read EGRESS_ADDR register + before it is written to. */ msg("CYU3P_GPIF_ERR_EGADDR_INVALID"); break; - case CYU3P_GPIF_ERR_DATA_READ_ERR: /**< Read from DMA data thread which is not ready. */ + case CYU3P_GPIF_ERR_DATA_READ_ERR: /**< Read from DMA data thread which is not + ready. */ msg("CYU3P_GPIF_ERR_DATA_READ_ERR"); break; - case CYU3P_GPIF_ERR_DATA_WRITE_ERR: /**< Write to DMA data thread which is not ready. */ + case CYU3P_GPIF_ERR_DATA_WRITE_ERR: /**< Write to DMA data thread which is not + ready. */ msg("CYU3P_GPIF_ERR_DATA_WRITE_ERR"); break; - case CYU3P_GPIF_ERR_ADDR_READ_ERR: /**< Read from DMA address thread which is not ready. */ + case CYU3P_GPIF_ERR_ADDR_READ_ERR: /**< Read from DMA address thread which is + not ready. */ msg("CYU3P_GPIF_ERR_ADDR_READ_ERR"); break; - case CYU3P_GPIF_ERR_ADDR_WRITE_ERR: /**< Write to DMA address thread which is not ready. */ + case CYU3P_GPIF_ERR_ADDR_WRITE_ERR: /**< Write to DMA address thread which is + not ready. */ msg("CYU3P_GPIF_ERR_ADDR_WRITE_ERR"); break; - case CYU3P_GPIF_ERR_INVALID_STATE: /**< GPIF state machine has reached an invalid state. */ - //msg("CYU3P_GPIF_ERR_INVALID_STATE"); - ++g_counters.invalid_gpif_state; // UNSYNC'd + case CYU3P_GPIF_ERR_INVALID_STATE: /**< GPIF state machine has reached an + invalid state. */ + // msg("CYU3P_GPIF_ERR_INVALID_STATE"); + ++g_counters.invalid_gpif_state; // UNSYNC'd break; default: msg("Unknown CYU3P_GPIF_ERR %i", CYU3P_GET_GPIF_ERROR_TYPE(cbArg)); @@ -2124,7 +2213,7 @@ void gpif_error_cb(CyU3PPibIntrType cbType, uint16_t cbArg) void GpifStateChangeCb(uint8_t stateId) { - //msg("%d", stateId); + // msg("%d", stateId); ++g_counters.state_transition_count; } @@ -2134,15 +2223,16 @@ void GpifStateChangeCb(uint8_t stateId) * This function starts the GPIF Slave FIFO state machine on the FX3. Because on * of the GPIF pins is used for FPGA configuration, this cannot be done until * after FPGA configuration is complete. */ -void b200_gpif_init(void) { +void b200_gpif_init(void) +{ msg("b200_gpif_init"); CyU3PPibClock_t pib_clock_config; /* Initialize the p-port block; disable DLL for sync GPIF. */ - pib_clock_config.clkDiv = 2; - pib_clock_config.clkSrc = CY_U3P_SYS_CLK; - pib_clock_config.isHalfDiv = CyFalse; + pib_clock_config.clkDiv = 2; + pib_clock_config.clkSrc = CY_U3P_SYS_CLK; + pib_clock_config.isHalfDiv = CyFalse; pib_clock_config.isDllEnable = CyFalse; if (CyU3PPibInit(CyTrue, &pib_clock_config) != CY_U3P_SUCCESS) msg("! CyU3PPibInit"); @@ -2153,22 +2243,26 @@ void b200_gpif_init(void) { msg("GPIF loaded"); - //CyU3PGpifRegisterSMIntrCallback(GpifStateChangeCb); + // CyU3PGpifRegisterSMIntrCallback(GpifStateChangeCb); /* Start the state machine. */ - //CyU3PGpifSMStart(RESET, ALPHA_RESET); + // CyU3PGpifSMStart(RESET, ALPHA_RESET); /* Configure the watermarks for the slfifo-write buffers. */ - if (CyU3PGpifSocketConfigure(0, DATA_TX_PPORT_SOCKET, 5, CyFalse, 1) != CY_U3P_SUCCESS) + if (CyU3PGpifSocketConfigure(0, DATA_TX_PPORT_SOCKET, 5, CyFalse, 1) + != CY_U3P_SUCCESS) msg("! CyU3PGpifSocketConfigure 0"); - if (CyU3PGpifSocketConfigure(1, DATA_RX_PPORT_SOCKET, 6, CyFalse, 1) != CY_U3P_SUCCESS) + if (CyU3PGpifSocketConfigure(1, DATA_RX_PPORT_SOCKET, 6, CyFalse, 1) + != CY_U3P_SUCCESS) msg("! CyU3PGpifSocketConfigure 1"); - if (CyU3PGpifSocketConfigure(2, CTRL_COMM_PPORT_SOCKET, 5, CyFalse, 1) != CY_U3P_SUCCESS) + if (CyU3PGpifSocketConfigure(2, CTRL_COMM_PPORT_SOCKET, 5, CyFalse, 1) + != CY_U3P_SUCCESS) msg("! CyU3PGpifSocketConfigure 2"); - if (CyU3PGpifSocketConfigure(3, CTRL_RESP_PPORT_SOCKET, 6, CyFalse, 1) != CY_U3P_SUCCESS) + if (CyU3PGpifSocketConfigure(3, CTRL_RESP_PPORT_SOCKET, 6, CyFalse, 1) + != CY_U3P_SUCCESS) msg("! CyU3PGpifSocketConfigure 3"); - //CyU3PGpifSMStart(RESET, ALPHA_RESET); + // CyU3PGpifSMStart(RESET, ALPHA_RESET); /* Register a callback for notification of PIB interrupts*/ CyU3PPibRegisterCallback(gpif_error_cb, CYU3P_PIB_INTR_ERROR); @@ -2179,7 +2273,8 @@ void b200_gpif_init(void) { * This module is used for programming the FPGA. After the FPGA is configured, * the SPI module is disabled, as it cannot be used while we are using GPIF * 32-bit mode. */ -CyU3PReturnStatus_t b200_spi_init(void) { +CyU3PReturnStatus_t b200_spi_init(void) +{ msg("b200_spi_init"); CyU3PSpiConfig_t spiConfig; @@ -2190,7 +2285,7 @@ CyU3PReturnStatus_t b200_spi_init(void) { /* Start the SPI master block. Run the SPI clock at 8MHz * and configure the word length to 8 bits. Also configure * the slave select using FW. */ - CyU3PMemSet ((uint8_t *)&spiConfig, 0, sizeof(spiConfig)); + CyU3PMemSet((uint8_t*)&spiConfig, 0, sizeof(spiConfig)); spiConfig.isLsbFirst = CyFalse; spiConfig.cpol = CyFalse; spiConfig.cpha = CyFalse; @@ -2215,8 +2310,9 @@ CyU3PReturnStatus_t b200_spi_init(void) { * This function handles USB initialization, re-enumeration (and thus coming up * as a USRP B200 device), configures USB endpoints and the DMA module. */ -void b200_usb_init(void) { - //msg("b200_usb_init"); +void b200_usb_init(void) +{ + // msg("b200_usb_init"); /* Initialize the I2C interface for the EEPROM of page size 64 bytes. */ CyFxI2cInit(CY_FX_USBI2C_I2C_PAGE_SIZE); @@ -2248,54 +2344,45 @@ void b200_usb_init(void) { common_usb3_dev_desc[10] = pid & 0xFF; common_usb3_dev_desc[11] = pid >> 8; - const uint8_t *mfr_string = get_manufacturer_string_descriptor(vid); - const uint8_t *product_string = get_product_string_descriptor(pid); - const uint8_t *serial_string = get_serial_string_descriptor(&eeprom_read); + const uint8_t* mfr_string = get_manufacturer_string_descriptor(vid); + const uint8_t* product_string = get_product_string_descriptor(pid); + const uint8_t* serial_string = get_serial_string_descriptor(&eeprom_read); /* Set our USB enumeration descriptors! Note that there are different - * function calls for each USB speed: FS, HS, SS. */ + * function calls for each USB speed: FS, HS, SS. */ /* Device descriptors */ - CyU3PUsbSetDesc(CY_U3P_USB_SET_HS_DEVICE_DESCR, 0, - (uint8_t *)common_usb2_dev_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_HS_DEVICE_DESCR, 0, (uint8_t*)common_usb2_dev_desc); - CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_DEVICE_DESCR, 0, - (uint8_t *)common_usb3_dev_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_DEVICE_DESCR, 0, (uint8_t*)common_usb3_dev_desc); /* Device qualifier descriptors */ - CyU3PUsbSetDesc(CY_U3P_USB_SET_DEVQUAL_DESCR, 0, - (uint8_t *)common_dev_qual_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_DEVQUAL_DESCR, 0, (uint8_t*)common_dev_qual_desc); /* Configuration descriptors */ - CyU3PUsbSetDesc(CY_U3P_USB_SET_HS_CONFIG_DESCR, 0, - (uint8_t *)b200_usb_hs_config_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_HS_CONFIG_DESCR, 0, (uint8_t*)b200_usb_hs_config_desc); - CyU3PUsbSetDesc(CY_U3P_USB_SET_FS_CONFIG_DESCR, 0, - (uint8_t *)b200_usb_fs_config_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_FS_CONFIG_DESCR, 0, (uint8_t*)b200_usb_fs_config_desc); - CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_CONFIG_DESCR, 0, - (uint8_t *)b200_usb_ss_config_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_CONFIG_DESCR, 0, (uint8_t*)b200_usb_ss_config_desc); /* BOS Descriptor */ - CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_BOS_DESCR, 0, - (uint8_t *)common_usb_bos_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_SS_BOS_DESCR, 0, (uint8_t*)common_usb_bos_desc); /* String descriptors */ - CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 0, - (uint8_t *)common_string_lang_id_desc); + CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 0, (uint8_t*)common_string_lang_id_desc); - CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 1, - (uint8_t *)mfr_string); + CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 1, (uint8_t*)mfr_string); - CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 2, - (uint8_t *)product_string); + CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 2, (uint8_t*)product_string); - CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 3, - (uint8_t *)serial_string); + CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 3, (uint8_t*)serial_string); //////////////////////////////////////////////////////// - const uint32_t tx_swing = g_config.tx_swing/*65*//*45*/; // 65 & 45 are OK, 120 causes much link recovery. <128. 1.2V is USB3 limit. + const uint32_t tx_swing = + g_config.tx_swing /*65*/ /*45*/; // 65 & 45 are OK, 120 causes much link recovery. + // <128. 1.2V is USB3 limit. if (CyU3PUsbSetTxSwing(tx_swing) == CY_U3P_SUCCESS) msg("CyU3PUsbSetTxSwing: %d", tx_swing); else @@ -2304,16 +2391,17 @@ void b200_usb_init(void) { //////////////////////////////////////////////////////// /* Connect the USB pins, and enable SuperSpeed (USB 3.0). */ - if (CyU3PConnectState(CyTrue, (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) == CY_U3P_SUCCESS) { // connect, ssEnable + if (CyU3PConnectState(CyTrue, (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) + == CY_U3P_SUCCESS) { // connect, ssEnable CyU3PUSBSpeed_t usb_speed = CyU3PUsbGetSpeed(); msg("Link up (speed: USB %d)", (int)usb_speed); // MAGIC: Values happen to map - } - else + } else msg("! Failed to establish link"); } -void b200_restore_gpio_for_fpga_config(void) { +void b200_restore_gpio_for_fpga_config(void) +{ CyU3PDeviceGpioRestore(GPIO_FPGA_RESET); CyU3PDeviceGpioRestore(GPIO_DONE); @@ -2322,32 +2410,34 @@ void b200_restore_gpio_for_fpga_config(void) { CyU3PDeviceGpioRestore(GPIO_FX3_MISO); CyU3PDeviceGpioRestore(GPIO_FX3_MOSI); - //CyU3PGpioDeInit(); // Moved to just before init + // CyU3PGpioDeInit(); // Moved to just before init } -void thread_fpga_config_entry(uint32_t input) { +void thread_fpga_config_entry(uint32_t input) +{ uint32_t event_flag; - //msg("thread_fpga_config_entry"); - - for(;;) { + // msg("thread_fpga_config_entry"); + for (;;) { // Event is set through VREQ - if(CyU3PEventGet(&g_event_usb_config, \ - (EVENT_FPGA_CONFIG), CYU3P_EVENT_AND_CLEAR, \ - &event_flag, CYU3P_WAIT_FOREVER) == CY_U3P_SUCCESS) { - - //uint8_t old_state = g_fx3_state; + if (CyU3PEventGet(&g_event_usb_config, + (EVENT_FPGA_CONFIG), + CYU3P_EVENT_AND_CLEAR, + &event_flag, + CYU3P_WAIT_FOREVER) + == CY_U3P_SUCCESS) { + // uint8_t old_state = g_fx3_state; uint32_t old_fpga_programming_write_count = 0; - if(g_fx3_state == STATE_ERROR) { + if (g_fx3_state == STATE_ERROR) { CyU3PThreadRelinquish(); continue; } - if(g_fx3_state == STATE_RUNNING) { + if (g_fx3_state == STATE_RUNNING) { /* The FX3 is currently configured for SLFIFO mode. We need to tear down - * this configuration and re-configure to program the FPGA. */ + * this configuration and re-configure to program the FPGA. */ b200_restore_gpio_for_fpga_config(); CyU3PGpifDisable(CyTrue); } @@ -2362,7 +2452,7 @@ void thread_fpga_config_entry(uint32_t input) { CyU3PSysWatchDogClear(); /* Initialize the SPI module that will be used for FPGA programming. */ - b200_spi_init(); // This must be done *after* 'b200_gpios_pre_fpga_config' + b200_spi_init(); // This must be done *after* 'b200_gpios_pre_fpga_config' CyU3PSysWatchDogClear(); @@ -2375,13 +2465,19 @@ void thread_fpga_config_entry(uint32_t input) { msg("Begin FPGA"); // Event is set through VREQ - while(CyU3PEventGet(&g_event_usb_config, \ - (EVENT_BITSTREAM_START), CYU3P_EVENT_AND_CLEAR, \ - &event_flag, CYU3P_NO_WAIT) != CY_U3P_SUCCESS) { - - if(wait_count >= FPGA_PROGRAMMING_BITSTREAM_START_POLL_COUNT) { + while (CyU3PEventGet(&g_event_usb_config, + (EVENT_BITSTREAM_START), + CYU3P_EVENT_AND_CLEAR, + &event_flag, + CYU3P_NO_WAIT) + != CY_U3P_SUCCESS) { + if (wait_count >= FPGA_PROGRAMMING_BITSTREAM_START_POLL_COUNT) { msg("! Bitstream didn't start"); - g_fx3_state = STATE_UNCONFIGURED; // Since IO configuration has changed, leave it in the unconfigured state (rather than the previous one, which might have been running) + g_fx3_state = + STATE_UNCONFIGURED; // Since IO configuration has changed, leave + // it in the unconfigured state (rather than + // the previous one, which might have been + // running) CyU3PThreadRelinquish(); break; } @@ -2404,13 +2500,16 @@ void thread_fpga_config_entry(uint32_t input) { msg("Wait FPGA"); - while(CyU3PEventGet(&g_event_usb_config, \ - (EVENT_GPIO_INITB_RISE), CYU3P_EVENT_AND_CLEAR, \ - &event_flag, CYU3P_NO_WAIT) != CY_U3P_SUCCESS) { - - if(wait_count >= FPGA_PROGRAMMING_INITB_POLL_COUNT) { + while (CyU3PEventGet(&g_event_usb_config, + (EVENT_GPIO_INITB_RISE), + CYU3P_EVENT_AND_CLEAR, + &event_flag, + CYU3P_NO_WAIT) + != CY_U3P_SUCCESS) { + if (wait_count >= FPGA_PROGRAMMING_INITB_POLL_COUNT) { msg("! INITB didn't rise"); - g_fx3_state = STATE_UNCONFIGURED; // Safer to call it unconfigured than the previous state + g_fx3_state = STATE_UNCONFIGURED; // Safer to call it unconfigured + // than the previous state CyU3PThreadRelinquish(); break; } @@ -2420,16 +2519,12 @@ void thread_fpga_config_entry(uint32_t input) { CyU3PSysWatchDogClear(); } #ifdef ENABLE_INIT_B_WORKAROUND - if (wait_count >= FPGA_PROGRAMMING_INITB_POLL_COUNT) - { + if (wait_count >= FPGA_PROGRAMMING_INITB_POLL_COUNT) { CyBool_t gpio_init_b; CyU3PGpioGetValue(GPIO_INIT_B, &gpio_init_b); - if (gpio_init_b == CyTrue) - { + if (gpio_init_b == CyTrue) { wait_count = 0; - } - else - { + } else { msg("! INIT_B still not high"); } } @@ -2438,32 +2533,37 @@ void thread_fpga_config_entry(uint32_t input) { continue; /* We are ready to accept the FPGA bitstream! */ - wait_count = 0; + wait_count = 0; g_fx3_state = STATE_CONFIGURING_FPGA; msg("Configuring FPGA"); - // g_fpga_programming_write_count is zero'd by VREQ triggering EVENT_BITSTREAM_START - - while(CyU3PEventGet(&g_event_usb_config, \ - (EVENT_GPIO_DONE_HIGH), CYU3P_EVENT_AND_CLEAR, \ - &event_flag, CYU3P_NO_WAIT) != CY_U3P_SUCCESS) { + // g_fpga_programming_write_count is zero'd by VREQ triggering + // EVENT_BITSTREAM_START + while (CyU3PEventGet(&g_event_usb_config, + (EVENT_GPIO_DONE_HIGH), + CYU3P_EVENT_AND_CLEAR, + &event_flag, + CYU3P_NO_WAIT) + != CY_U3P_SUCCESS) { /* Wait for the configuration to complete, which will be indicated * by the DONE pin going high and triggering the associated * interrupt. */ - if(wait_count >= FPGA_PROGRAMMING_DONE_POLL_COUNT) { + if (wait_count >= FPGA_PROGRAMMING_DONE_POLL_COUNT) { msg("! DONE didn't go high"); g_fx3_state = STATE_UNCONFIGURED; CyU3PThreadRelinquish(); break; } - if (old_fpga_programming_write_count == g_fpga_programming_write_count) // Only increment wait count if we haven't written anything + if (old_fpga_programming_write_count + == g_fpga_programming_write_count) // Only increment wait count if we + // haven't written anything wait_count++; else { - wait_count = 0; + wait_count = 0; old_fpga_programming_write_count = g_fpga_programming_write_count; } @@ -2471,16 +2571,12 @@ void thread_fpga_config_entry(uint32_t input) { CyU3PSysWatchDogClear(); } #ifdef ENABLE_DONE_WORKAROUND - if (wait_count >= FPGA_PROGRAMMING_DONE_POLL_COUNT) - { + if (wait_count >= FPGA_PROGRAMMING_DONE_POLL_COUNT) { CyBool_t gpio_done; CyU3PGpioGetValue(GPIO_DONE, &gpio_done); - if (gpio_done == CyTrue) - { + if (gpio_done == CyTrue) { wait_count = 0; - } - else - { + } else { msg("! DONE still not high"); } } @@ -2496,7 +2592,7 @@ void thread_fpga_config_entry(uint32_t input) { CyU3PSysWatchDogClear(); /* Now that the FPGA is configured, we need to tear down the current SPI and - * GPIO configs, and re-config for GPIF & bit-banged SPI operation. */ + * GPIO configs, and re-config for GPIF & bit-banged SPI operation. */ CyU3PSpiDeInit(); b200_restore_gpio_for_fpga_config(); @@ -2506,16 +2602,16 @@ void thread_fpga_config_entry(uint32_t input) { b200_slfifo_mode_gpio_config(); /* Tone down the drive strength on the P-port. */ - //CyU3PSetPportDriveStrength(CY_U3P_DS_HALF_STRENGTH); + // CyU3PSetPportDriveStrength(CY_U3P_DS_HALF_STRENGTH); CyU3PSysWatchDogClear(); /* FPGA configuration is complete! Time to get the GPIF state machine - * running for Slave FIFO. */ + * running for Slave FIFO. */ b200_gpif_init(); CyU3PThreadSleep(1); - b200_start_fpga_sb_gpio(); // Moved here to give SB time to init + b200_start_fpga_sb_gpio(); // Moved here to give SB time to init /* RUN, BABY, RUN! */ g_fx3_state = STATE_RUNNING; @@ -2536,11 +2632,12 @@ void thread_fpga_config_entry(uint32_t input) { * FX3 for slave-fifo, and enters an infinite loop where it simply updates the * watchdog timer and does some minor power management state checking. */ -void thread_main_app_entry(uint32_t input) { - //msg("thread_main_app_entry"); +void thread_main_app_entry(uint32_t input) +{ + // msg("thread_main_app_entry"); /* In your spectrum, stealing your Hz. */ - for(;;) { + for (;;) { CyU3PSysWatchDogClear(); CyU3PThreadSleep(CHECK_POWER_STATE_SLEEP_TIME); #ifdef PREVENT_LOW_POWER_MODE @@ -2551,26 +2648,26 @@ void thread_main_app_entry(uint32_t input) { { CyU3PUsbLinkPowerMode current_state; - if((CyU3PUsbGetSpeed () == CY_U3P_SUPER_SPEED)) { - + if ((CyU3PUsbGetSpeed() == CY_U3P_SUPER_SPEED)) { /* If the link is in U1/U2 states, try to get back to U0. */ CyU3PUsbGetLinkPowerState(¤t_state); if (current_state > CyU3PUsbLPM_U3) msg("Power state %i", current_state); - while((current_state >= CyU3PUsbLPM_U1) \ - && (current_state <= CyU3PUsbLPM_U3)) { - + while ((current_state >= CyU3PUsbLPM_U1) + && (current_state <= CyU3PUsbLPM_U3)) { msg("! LPS = %i", current_state); - CyU3PUsbSetLinkPowerState(CyU3PUsbLPM_U0); // This will wake up the host if it's trying to sleep + CyU3PUsbSetLinkPowerState( + CyU3PUsbLPM_U0); // This will wake up the host if it's trying to + // sleep CyU3PThreadSleep(1); - if (CyU3PUsbGetSpeed () != CY_U3P_SUPER_SPEED) + if (CyU3PUsbGetSpeed() != CY_U3P_SUPER_SPEED) break; - CyU3PUsbGetLinkPowerState (¤t_state); + CyU3PUsbGetLinkPowerState(¤t_state); } } } @@ -2581,12 +2678,13 @@ void thread_main_app_entry(uint32_t input) { static uint16_t g_poll_last_phy_error_count = 0, g_poll_last_link_error_count = 0; static uint32_t g_poll_last_phy_error_status = 0; -void update_error_counters(void) { - if (CyU3PUsbGetSpeed () != CY_U3P_SUPER_SPEED) +void update_error_counters(void) +{ + if (CyU3PUsbGetSpeed() != CY_U3P_SUPER_SPEED) return; uvint32_t reg = REG_LNK_PHY_ERROR_STATUS; - uint32_t val = 0; + uint32_t val = 0; if (CyU3PReadDeviceRegisters((uvint32_t*)reg, 1, &val) == CY_U3P_SUCCESS) { g_poll_last_phy_error_status |= (val & PHYERR_MASK); @@ -2594,23 +2692,22 @@ void update_error_counters(void) { uint32_t zero = PHYERR_MASK; if (CyU3PWriteDeviceRegisters((uvint32_t*)reg, 1, &zero) != CY_U3P_SUCCESS) msg("! CyU3PWriteDeviceRegisters"); - } - else { + } else { // FIXME: Log once msg("! Reg read fail"); } // Equivalent code: - //uint32_t* p = (uint32_t*)REG_LNK_PHY_ERROR_STATUS; - //val = (*p); + // uint32_t* p = (uint32_t*)REG_LNK_PHY_ERROR_STATUS; + // val = (*p); //(*p) = PHYERR_MASK; uint16_t phy_error_count = 0, link_error_count = 0; - if (CyU3PUsbGetErrorCounts(&phy_error_count, &link_error_count) == CY_U3P_SUCCESS) { // Resets internal counters after call + if (CyU3PUsbGetErrorCounts(&phy_error_count, &link_error_count) + == CY_U3P_SUCCESS) { // Resets internal counters after call g_poll_last_phy_error_count += phy_error_count; g_poll_last_link_error_count += link_error_count; - } - else { + } else { // FIXME: Log once msg("! CyU3PUsbGetErrorCounts"); } @@ -2620,172 +2717,227 @@ void update_error_counters(void) { g_counters.usb_error_counters.phy_error_count += phy_error_count; g_counters.usb_error_counters.link_error_count += link_error_count; if (val & PHYERR_MASK) { - if (val & PHYERR_PHY_LOCK_EV) g_counters.usb_error_counters.PHY_LOCK_EV++; - if (val & PHYERR_TRAINING_ERROR_EV) g_counters.usb_error_counters.TRAINING_ERROR_EV++; - if (val & PHYERR_RX_ERROR_CRC32_EV) g_counters.usb_error_counters.RX_ERROR_CRC32_EV++; - if (val & PHYERR_RX_ERROR_CRC16_EV) g_counters.usb_error_counters.RX_ERROR_CRC16_EV++; - if (val & PHYERR_RX_ERROR_CRC5_EV) g_counters.usb_error_counters.RX_ERROR_CRC5_EV++; - if (val & PHYERR_PHY_ERROR_DISPARITY_EV)g_counters.usb_error_counters.PHY_ERROR_DISPARITY_EV++; - if (val & PHYERR_PHY_ERROR_EB_UND_EV) g_counters.usb_error_counters.PHY_ERROR_EB_UND_EV++; - if (val & PHYERR_PHY_ERROR_EB_OVR_EV) g_counters.usb_error_counters.PHY_ERROR_EB_OVR_EV++; - if (val & PHYERR_PHY_ERROR_DECODE_EV) g_counters.usb_error_counters.PHY_ERROR_DECODE_EV++; + if (val & PHYERR_PHY_LOCK_EV) + g_counters.usb_error_counters.PHY_LOCK_EV++; + if (val & PHYERR_TRAINING_ERROR_EV) + g_counters.usb_error_counters.TRAINING_ERROR_EV++; + if (val & PHYERR_RX_ERROR_CRC32_EV) + g_counters.usb_error_counters.RX_ERROR_CRC32_EV++; + if (val & PHYERR_RX_ERROR_CRC16_EV) + g_counters.usb_error_counters.RX_ERROR_CRC16_EV++; + if (val & PHYERR_RX_ERROR_CRC5_EV) + g_counters.usb_error_counters.RX_ERROR_CRC5_EV++; + if (val & PHYERR_PHY_ERROR_DISPARITY_EV) + g_counters.usb_error_counters.PHY_ERROR_DISPARITY_EV++; + if (val & PHYERR_PHY_ERROR_EB_UND_EV) + g_counters.usb_error_counters.PHY_ERROR_EB_UND_EV++; + if (val & PHYERR_PHY_ERROR_EB_OVR_EV) + g_counters.usb_error_counters.PHY_ERROR_EB_OVR_EV++; + if (val & PHYERR_PHY_ERROR_DECODE_EV) + g_counters.usb_error_counters.PHY_ERROR_DECODE_EV++; } - UNLOCK(g_counters_lock); // FIXME: Read/write regs + UNLOCK(g_counters_lock); // FIXME: Read/write regs } -void thread_re_enum_entry(uint32_t input) { +void thread_re_enum_entry(uint32_t input) +{ uint32_t event_flag; - //msg("thread_re_enum_entry"); + // msg("thread_re_enum_entry"); int keep_alive = 0; while (1) { - if (CyU3PEventGet(&g_event_usb_config, \ - (EVENT_RE_ENUM), CYU3P_EVENT_AND_CLEAR, \ - &event_flag, RE_ENUM_THREAD_SLEEP_TIME) == CY_U3P_SUCCESS) { - msg("Re-config"); + if (CyU3PEventGet(&g_event_usb_config, + (EVENT_RE_ENUM), + CYU3P_EVENT_AND_CLEAR, + &event_flag, + RE_ENUM_THREAD_SLEEP_TIME) + == CY_U3P_SUCCESS) { + msg("Re-config"); - // FIXME: This section is not finished + // FIXME: This section is not finished - // Not locking this since we only expect one write in VREQ and read afterward here + // Not locking this since we only expect one write in VREQ and read afterward + // here - int re_enum = g_config_mod.flags & (CF_RE_ENUM | CF_TX_SWING | CF_TX_DEEMPHASIS | CF_DISABLE_USB2 | CF_ENABLE_AS_SUPERSPEED); + int re_enum = g_config_mod.flags + & (CF_RE_ENUM | CF_TX_SWING | CF_TX_DEEMPHASIS | CF_DISABLE_USB2 + | CF_ENABLE_AS_SUPERSPEED); - CyU3PThreadSleep(100); // Wait for EP0 xaction to complete + CyU3PThreadSleep(100); // Wait for EP0 xaction to complete - //b200_fw_stop(); + // b200_fw_stop(); -/* - int tx_swing; // [90] [65] 45 - int tx_deemphasis; // 0x11 - int disable_usb2; // 0 - int enable_as_superspeed; // 1 - int pport_drive_strength; // CY_U3P_DS_THREE_QUARTER_STRENGTH - int dma_buffer_size; // [USB3] (max) - int dma_buffer_count; // [USB3] 1 - int manual_dma; // 0 - int sb_baud_div; // 434*2 -*/ + /* + int tx_swing; // [90] [65] 45 + int tx_deemphasis; // 0x11 + int disable_usb2; // 0 + int enable_as_superspeed; // 1 + int pport_drive_strength; // CY_U3P_DS_THREE_QUARTER_STRENGTH + int dma_buffer_size; // [USB3] (max) + int dma_buffer_count; // [USB3] 1 + int manual_dma; // 0 + int sb_baud_div; // 434*2 + */ - if (re_enum) { - if (CyU3PConnectState(CyFalse, (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) == CY_U3P_SUCCESS) - msg("Link down"); - else - msg("! Failed to bring link down"); - } + if (re_enum) { + if (CyU3PConnectState( + CyFalse, (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) + == CY_U3P_SUCCESS) + msg("Link down"); + else + msg("! Failed to bring link down"); + } - if (g_config_mod.flags & CF_TX_DEEMPHASIS) { + if (g_config_mod.flags & CF_TX_DEEMPHASIS) { #if (CYFX_VERSION_MAJOR >= 1) && (CYFX_VERSION_MINOR >= 3) - if ((g_config_mod.config.tx_deemphasis < 0x1F) && (CyU3PUsbSetTxDeemphasis(g_config_mod.config.tx_deemphasis) == CY_U3P_SUCCESS)) { - msg("TX deemphasis now: %d (was: %d)", g_config_mod.config.tx_deemphasis, g_config.tx_deemphasis); - g_config.tx_deemphasis = g_config_mod.config.tx_deemphasis; - } - else + if ((g_config_mod.config.tx_deemphasis < 0x1F) + && (CyU3PUsbSetTxDeemphasis(g_config_mod.config.tx_deemphasis) + == CY_U3P_SUCCESS)) { + msg("TX deemphasis now: %d (was: %d)", + g_config_mod.config.tx_deemphasis, + g_config.tx_deemphasis); + g_config.tx_deemphasis = g_config_mod.config.tx_deemphasis; + } else #endif // #if (CYFX_VERSION_MAJOR >= 1) && (CYFX_VERSION_MINOR >= 3) - msg("! Failed to set TX deemphasis: %d (still: %d)", g_config_mod.config.tx_deemphasis, g_config.tx_deemphasis); - } + msg("! Failed to set TX deemphasis: %d (still: %d)", + g_config_mod.config.tx_deemphasis, + g_config.tx_deemphasis); + } - if (g_config_mod.flags & CF_TX_SWING) { - if ((g_config_mod.config.tx_swing < 128) && (CyU3PUsbSetTxSwing(g_config_mod.config.tx_swing) == CY_U3P_SUCCESS)) { - msg("TX swing now: %d (was: %d)", g_config_mod.config.tx_swing, g_config.tx_swing); - g_config.tx_swing = g_config_mod.config.tx_swing; - } - else - msg("! Failed to set TX swing: %d (still: %d)", g_config_mod.config.tx_swing, g_config.tx_swing); - } + if (g_config_mod.flags & CF_TX_SWING) { + if ((g_config_mod.config.tx_swing < 128) + && (CyU3PUsbSetTxSwing(g_config_mod.config.tx_swing) + == CY_U3P_SUCCESS)) { + msg("TX swing now: %d (was: %d)", + g_config_mod.config.tx_swing, + g_config.tx_swing); + g_config.tx_swing = g_config_mod.config.tx_swing; + } else + msg("! Failed to set TX swing: %d (still: %d)", + g_config_mod.config.tx_swing, + g_config.tx_swing); + } - if (g_config_mod.flags & CF_DISABLE_USB2) { - if (CyU3PUsbControlUsb2Support((g_config_mod.config.disable_usb2 != 0 ? CyTrue : CyFalse)) == CY_U3P_SUCCESS) { - msg("USB 2 support now: %s (was: %d)", (g_config_mod.config.disable_usb2 ? "disabled" : "enabled"), (g_config.disable_usb2 ? "disabled" : "enabled")); - g_config.disable_usb2 = g_config_mod.config.disable_usb2; - } - else - msg("! Failed to change USB 2 support to: %s (still: %s)", (g_config_mod.config.disable_usb2 ? "enabled" : "disabled"), (g_config.disable_usb2 ? "enabled" : "disabled")); - } + if (g_config_mod.flags & CF_DISABLE_USB2) { + if (CyU3PUsbControlUsb2Support( + (g_config_mod.config.disable_usb2 != 0 ? CyTrue : CyFalse)) + == CY_U3P_SUCCESS) { + msg("USB 2 support now: %s (was: %d)", + (g_config_mod.config.disable_usb2 ? "disabled" : "enabled"), + (g_config.disable_usb2 ? "disabled" : "enabled")); + g_config.disable_usb2 = g_config_mod.config.disable_usb2; + } else + msg("! Failed to change USB 2 support to: %s (still: %s)", + (g_config_mod.config.disable_usb2 ? "enabled" : "disabled"), + (g_config.disable_usb2 ? "enabled" : "disabled")); + } - if (g_config_mod.flags & CF_PPORT_DRIVE_STRENGTH) { - // CY_U3P_DS_QUARTER_STRENGTH,CY_U3P_DS_HALF_STRENGTH,CY_U3P_DS_THREE_QUARTER_STRENGTH,CY_U3P_DS_FULL_STRENGTH - if ((g_config_mod.config.pport_drive_strength >= CY_U3P_DS_QUARTER_STRENGTH) && - (g_config_mod.config.pport_drive_strength <= CY_U3P_DS_FULL_STRENGTH) && - (CyU3PSetPportDriveStrength(g_config_mod.config.pport_drive_strength) == CY_U3P_SUCCESS)) { - msg("PPort drive strength now: %d (was: %d)", g_config_mod.config.pport_drive_strength, g_config.pport_drive_strength); - g_config.pport_drive_strength = g_config_mod.config.pport_drive_strength; - } - else - msg("! Failed to set PPort drive strength: %d (still: %d)", g_config_mod.config.pport_drive_strength, g_config.pport_drive_strength); - } + if (g_config_mod.flags & CF_PPORT_DRIVE_STRENGTH) { + // CY_U3P_DS_QUARTER_STRENGTH,CY_U3P_DS_HALF_STRENGTH,CY_U3P_DS_THREE_QUARTER_STRENGTH,CY_U3P_DS_FULL_STRENGTH + if ((g_config_mod.config.pport_drive_strength + >= CY_U3P_DS_QUARTER_STRENGTH) + && (g_config_mod.config.pport_drive_strength + <= CY_U3P_DS_FULL_STRENGTH) + && (CyU3PSetPportDriveStrength( + g_config_mod.config.pport_drive_strength) + == CY_U3P_SUCCESS)) { + msg("PPort drive strength now: %d (was: %d)", + g_config_mod.config.pport_drive_strength, + g_config.pport_drive_strength); + g_config.pport_drive_strength = + g_config_mod.config.pport_drive_strength; + } else + msg("! Failed to set PPort drive strength: %d (still: %d)", + g_config_mod.config.pport_drive_strength, + g_config.pport_drive_strength); + } - int reinit_dma = g_config_mod.flags & (CF_MANUAL_DMA | CF_DMA_BUFFER_COUNT | CF_DMA_BUFFER_SIZE); - if (re_enum) - reinit_dma = 0; // Don't need to if re-enumerating + int reinit_dma = g_config_mod.flags + & (CF_MANUAL_DMA | CF_DMA_BUFFER_COUNT | CF_DMA_BUFFER_SIZE); + if (re_enum) + reinit_dma = 0; // Don't need to if re-enumerating - if (g_config_mod.flags & CF_MANUAL_DMA) { + if (g_config_mod.flags & CF_MANUAL_DMA) { #ifdef ENABLE_MANUAL_DMA_XFER - msg("DMA transfers will be: %s (was: %s)", (g_config_mod.config.manual_dma ? "manual" : "auto"), (g_config.manual_dma ? "manual" : "auto")); - g_config.manual_dma = g_config_mod.config.manual_dma; + msg("DMA transfers will be: %s (was: %s)", + (g_config_mod.config.manual_dma ? "manual" : "auto"), + (g_config.manual_dma ? "manual" : "auto")); + g_config.manual_dma = g_config_mod.config.manual_dma; #else - msg("! Manual DMA transfers not compiled into FW"); + msg("! Manual DMA transfers not compiled into FW"); #endif // ENABLE_MANUAL_DMA_XFER - } + } - if (g_config_mod.flags & CF_DMA_BUFFER_COUNT) { - msg("DMA buffer count will be: %d (was: %d)", g_config_mod.config.dma_buffer_count, g_config.dma_buffer_count); - g_config.dma_buffer_count = g_config_mod.config.dma_buffer_count; - } + if (g_config_mod.flags & CF_DMA_BUFFER_COUNT) { + msg("DMA buffer count will be: %d (was: %d)", + g_config_mod.config.dma_buffer_count, + g_config.dma_buffer_count); + g_config.dma_buffer_count = g_config_mod.config.dma_buffer_count; + } - if (g_config_mod.flags & CF_DMA_BUFFER_SIZE) { - msg("DMA buffer size will be: %d (was: %d)", g_config_mod.config.dma_buffer_size, g_config.dma_buffer_size); - g_config.dma_buffer_size = g_config_mod.config.dma_buffer_size; - } + if (g_config_mod.flags & CF_DMA_BUFFER_SIZE) { + msg("DMA buffer size will be: %d (was: %d)", + g_config_mod.config.dma_buffer_size, + g_config.dma_buffer_size); + g_config.dma_buffer_size = g_config_mod.config.dma_buffer_size; + } - if (g_config_mod.flags & CF_SB_BAUD_DIV) { + if (g_config_mod.flags & CF_SB_BAUD_DIV) { #ifdef ENABLE_FPGA_SB - LOCK(g_suart_lock); - sb_write(SUART_CLKDIV, g_config_mod.config.sb_baud_div); - UNLOCK(g_suart_lock); - msg("SUART_CLKDIV now: %d (was: %d)", g_config_mod.config.sb_baud_div, g_config.sb_baud_div); - g_config.sb_baud_div = g_config_mod.config.sb_baud_div; + LOCK(g_suart_lock); + sb_write(SUART_CLKDIV, g_config_mod.config.sb_baud_div); + UNLOCK(g_suart_lock); + msg("SUART_CLKDIV now: %d (was: %d)", + g_config_mod.config.sb_baud_div, + g_config.sb_baud_div); + g_config.sb_baud_div = g_config_mod.config.sb_baud_div; #else - msg("! Failed to set SUART_CLKDIV: SB is disabled (still: %d)", g_config.sb_baud_div); + msg("! Failed to set SUART_CLKDIV: SB is disabled (still: %d)", + g_config.sb_baud_div); #endif // ENABLE_FPGA_SB + } + + // b200_fw_start() + + if (g_config_mod.flags & CF_ENABLE_AS_SUPERSPEED) { + msg("Enable SuperSpeed: %s (was: %s)", + (g_config_mod.config.enable_as_superspeed ? "yes" : "no"), + (g_config.enable_as_superspeed ? "yes" : "no")); + g_config.enable_as_superspeed = g_config_mod.config.enable_as_superspeed; + } + + if (reinit_dma) { + if (g_app_running) { + msg("Stopping FW..."); + + b200_fw_stop(); } - //b200_fw_start() + msg("Starting FW..."); - if (g_config_mod.flags & CF_ENABLE_AS_SUPERSPEED) { - msg("Enable SuperSpeed: %s (was: %s)", (g_config_mod.config.enable_as_superspeed ? "yes" : "no"), (g_config.enable_as_superspeed ? "yes" : "no")); - g_config.enable_as_superspeed = g_config_mod.config.enable_as_superspeed; - } - - if (reinit_dma) { - if (g_app_running) { - msg("Stopping FW..."); - - b200_fw_stop(); - } - - msg("Starting FW..."); - - b200_fw_start(); - } - else // Shouldn't be re-init'ing AND re-enum'ing + b200_fw_start(); + } else // Shouldn't be re-init'ing AND re-enum'ing /* Connect the USB pins, and enable SuperSpeed (USB 3.0). */ if (re_enum) { - msg("Connecting... (as SuperSpeed: %d)", g_config.enable_as_superspeed); + msg("Connecting... (as SuperSpeed: %d)", + g_config.enable_as_superspeed); - if (CyU3PConnectState(CyTrue, (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) == CY_U3P_SUCCESS) { // CHECK: Assuming all other important state will persist + if (CyU3PConnectState(CyTrue, + (g_config.enable_as_superspeed != 0 ? CyTrue : CyFalse)) + == CY_U3P_SUCCESS) { // CHECK: Assuming all other important state + // will persist CyU3PUSBSpeed_t usb_speed = CyU3PUsbGetSpeed(); - msg("Link up (speed: USB %d)", (int)usb_speed); // MAGIC: Values happen to map - } - else + msg("Link up (speed: USB %d)", + (int)usb_speed); // MAGIC: Values happen to map + } else msg("! Failed to bring link up"); } - counters_reset_usb_errors(); - } - else { + counters_reset_usb_errors(); + } else { if (++keep_alive == KEEP_ALIVE_LOOP_COUNT) { msg("Keep-alive"); keep_alive = 0; @@ -2800,15 +2952,17 @@ void thread_re_enum_entry(uint32_t input) { } -void base16_encode(uint8_t v, char out[2], char first) { +void base16_encode(uint8_t v, char out[2], char first) +{ out[0] = first + (v >> 4); out[1] = first + (v & 0x0F); } #ifdef ENABLE_FPGA_SB -void thread_fpga_sb_poll_entry(uint32_t input) { - //msg("thread_fpga_sb_poll_entry"); +void thread_fpga_sb_poll_entry(uint32_t input) +{ + // msg("thread_fpga_sb_poll_entry"); while (1) { uint16_t i; @@ -2823,18 +2977,21 @@ void thread_fpga_sb_poll_entry(uint32_t input) { if (g_poll_last_phy_error_status != 0) has_change = 1; - uint16_t idx = CyU3PUsbGetEventLogIndex(); // Current *write* pointer - if (idx > (USB_EVENT_LOG_SIZE-1)) { + uint16_t idx = CyU3PUsbGetEventLogIndex(); // Current *write* pointer + if (idx > (USB_EVENT_LOG_SIZE - 1)) { msg("! USB event log idx = %i", (int)idx); break; } uint8_t has_usb_events = 0; - // Assuming logging won't wrap around between get calls (i.e. buffer should be long enough) + // Assuming logging won't wrap around between get calls (i.e. buffer should be + // long enough) if (g_fpga_sb_last_usb_event_log_index != idx) { if (idx < g_fpga_sb_last_usb_event_log_index) { - for (i = g_fpga_sb_last_usb_event_log_index; i < USB_EVENT_LOG_SIZE; i++) { - if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP + for (i = g_fpga_sb_last_usb_event_log_index; i < USB_EVENT_LOG_SIZE; + i++) { + if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 + && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP has_usb_events = 1; break; } @@ -2842,16 +2999,17 @@ void thread_fpga_sb_poll_entry(uint32_t input) { if (has_usb_events == 0) { for (i = 0; i < idx; i++) { - if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP + if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 + && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP has_usb_events = 1; break; } } } - } - else { + } else { for (i = g_fpga_sb_last_usb_event_log_index; i < idx; i++) { - if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP + if (g_usb_event_log[i] != 0x14 && g_usb_event_log[i] != 0x15 + && g_usb_event_log[i] != 0x16) { // CTRL, STATUS, ACKSETUP has_usb_events = 1; break; } @@ -2869,23 +3027,26 @@ void thread_fpga_sb_poll_entry(uint32_t input) { if (has_usb_events) { if (idx < g_fpga_sb_last_usb_event_log_index) { - for (i = g_fpga_sb_last_usb_event_log_index; i < USB_EVENT_LOG_SIZE; i++) { - if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP + for (i = g_fpga_sb_last_usb_event_log_index; i < USB_EVENT_LOG_SIZE; + i++) { + if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 + || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP continue; base16_encode(g_usb_event_log[i], out, 'A'); _sb_write_string(out); } for (i = 0; i < idx; i++) { - if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP + if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 + || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP continue; base16_encode(g_usb_event_log[i], out, 'A'); _sb_write_string(out); } - } - else { + } else { for (i = g_fpga_sb_last_usb_event_log_index; i < idx; i++) { - if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP + if (g_usb_event_log[i] == 0x14 || g_usb_event_log[i] == 0x15 + || g_usb_event_log[i] == 0x16) // CTRL, STATUS, ACKSETUP continue; base16_encode(g_usb_event_log[i], out, 'A'); _sb_write_string(out); @@ -2926,7 +3087,7 @@ void thread_fpga_sb_poll_entry(uint32_t input) { UNLOCK(g_suart_lock); } - g_poll_last_phy_error_count = 0; + g_poll_last_phy_error_count = 0; g_poll_last_link_error_count = 0; g_poll_last_phy_error_status = 0; @@ -2945,17 +3106,18 @@ void thread_fpga_sb_poll_entry(uint32_t input) { * * If thread creation fails, lock the system and force a power reset. */ -void CyFxApplicationDefine(void) { +void CyFxApplicationDefine(void) +{ void *app_thread_ptr, *fpga_thread_ptr; #ifdef ENABLE_RE_ENUM_THREAD - void *re_enum_thread_ptr; + void* re_enum_thread_ptr; #endif // ENABLE_RE_ENUM_THREAD #ifdef ENABLE_FPGA_SB - void *fpga_sb_poll_thread_ptr; + void* fpga_sb_poll_thread_ptr; #endif // ENABLE_FPGA_SB g_counters.magic = COUNTER_MAGIC; - //memset(&g_config, 0xFF, sizeof(g_config)); // Initialise to -1 + // memset(&g_config, 0xFF, sizeof(g_config)); // Initialise to -1 CyU3PMutexCreate(&g_log_lock, CYU3P_NO_INHERIT); CyU3PMutexCreate(&g_counters_lock, CYU3P_NO_INHERIT); @@ -2993,7 +3155,11 @@ void CyFxApplicationDefine(void) { b200_enable_fpga_sb_gpio(CyTrue); msg("Compat: %d.%d", FX3_COMPAT_MAJOR, FX3_COMPAT_MINOR); - msg("FX3 SDK: %d.%d.%d (build %d)", CYFX_VERSION_MAJOR, CYFX_VERSION_MINOR, CYFX_VERSION_PATCH, CYFX_VERSION_BUILD); + msg("FX3 SDK: %d.%d.%d (build %d)", + CYFX_VERSION_MAJOR, + CYFX_VERSION_MINOR, + CYFX_VERSION_PATCH, + CYFX_VERSION_BUILD); msg("FW built: %s %s", __TIME__, __DATE__); //////////////////////////////////////////////////////// @@ -3018,60 +3184,61 @@ void CyFxApplicationDefine(void) { /* Create the thread for the application */ if (app_thread_ptr != NULL) CyU3PThreadCreate(&thread_main_app, - "200:B200 Main", - thread_main_app_entry, - 0, - app_thread_ptr, - APP_THREAD_STACK_SIZE, - THREAD_PRIORITY, - THREAD_PRIORITY, - CYU3P_NO_TIME_SLICE, - CYU3P_AUTO_START); + "200:B200 Main", + thread_main_app_entry, + 0, + app_thread_ptr, + APP_THREAD_STACK_SIZE, + THREAD_PRIORITY, + THREAD_PRIORITY, + CYU3P_NO_TIME_SLICE, + CYU3P_AUTO_START); /* Create the thread for FPGA configuration. */ if (fpga_thread_ptr != NULL) CyU3PThreadCreate(&thread_fpga_config, - "300:B200 FPGA", - thread_fpga_config_entry, - 0, - fpga_thread_ptr, - APP_THREAD_STACK_SIZE, - THREAD_PRIORITY, - THREAD_PRIORITY, - CYU3P_NO_TIME_SLICE, - CYU3P_AUTO_START); + "300:B200 FPGA", + thread_fpga_config_entry, + 0, + fpga_thread_ptr, + APP_THREAD_STACK_SIZE, + THREAD_PRIORITY, + THREAD_PRIORITY, + CYU3P_NO_TIME_SLICE, + CYU3P_AUTO_START); #ifdef ENABLE_RE_ENUM_THREAD /* Create the thread for stats collection and re-enumeration/configuration */ if (re_enum_thread_ptr != NULL) CyU3PThreadCreate(&thread_re_enum, - "400:B200 Re-enum", - thread_re_enum_entry, - 0, - re_enum_thread_ptr, - APP_THREAD_STACK_SIZE, - THREAD_PRIORITY, - THREAD_PRIORITY, - CYU3P_NO_TIME_SLICE, - CYU3P_AUTO_START); + "400:B200 Re-enum", + thread_re_enum_entry, + 0, + re_enum_thread_ptr, + APP_THREAD_STACK_SIZE, + THREAD_PRIORITY, + THREAD_PRIORITY, + CYU3P_NO_TIME_SLICE, + CYU3P_AUTO_START); #endif // ENABLE_RE_ENUM_THREAD #ifdef ENABLE_FPGA_SB /* Create thread to handling Settings Bus logging/transactions */ if (fpga_sb_poll_thread_ptr != NULL) CyU3PThreadCreate(&thread_fpga_sb_poll, - "600:B200 FPGA SB poll", - thread_fpga_sb_poll_entry, - 0, - fpga_sb_poll_thread_ptr, - APP_THREAD_STACK_SIZE, - THREAD_PRIORITY, - THREAD_PRIORITY, - CYU3P_NO_TIME_SLICE, - CYU3P_AUTO_START); + "600:B200 FPGA SB poll", + thread_fpga_sb_poll_entry, + 0, + fpga_sb_poll_thread_ptr, + APP_THREAD_STACK_SIZE, + THREAD_PRIORITY, + THREAD_PRIORITY, + CYU3P_NO_TIME_SLICE, + CYU3P_AUTO_START); #endif // ENABLE_FPGA_SB } -int main(void) { +int main(void) +{ CyU3PReturnStatus_t status = CY_U3P_SUCCESS; CyU3PSysClockConfig_t clock_config; @@ -3081,15 +3248,15 @@ int main(void) { * MMIO Divider: 2 (~100 MHz) * 32 kHz Standby Clock: Disabled * System Clock Divider: 1 */ - clock_config.cpuClkDiv = 2; - clock_config.dmaClkDiv = 2; - clock_config.mmioClkDiv = 2; + clock_config.cpuClkDiv = 2; + clock_config.dmaClkDiv = 2; + clock_config.mmioClkDiv = 2; clock_config.useStandbyClk = CyFalse; - clock_config.clkSrc = CY_U3P_SYS_CLK; - clock_config.setSysClk400 = CyTrue; + clock_config.clkSrc = CY_U3P_SYS_CLK; + clock_config.setSysClk400 = CyTrue; status = CyU3PDeviceInit(&clock_config); - if(status != CY_U3P_SUCCESS) + if (status != CY_U3P_SUCCESS) goto handle_fatal_error; /* Initialize the caches. Enable instruction cache and keep data cache disabled. @@ -3097,7 +3264,8 @@ int main(void) { * accesses. When used in simple cases, it can decrease performance due to large * number of cache flushes and cleans and also it adds to the complexity of the * code. */ - status = CyU3PDeviceCacheControl(CyTrue, CyFalse, CyFalse); // Icache, Dcache, DMAcache + status = + CyU3PDeviceCacheControl(CyTrue, CyFalse, CyFalse); // Icache, Dcache, DMAcache if (status != CY_U3P_SUCCESS) goto handle_fatal_error; @@ -3105,7 +3273,7 @@ int main(void) { * bitmaps, where each bit represents the GPIO of the matching index - the * second array is index + 32. */ status = b200_set_io_matrix(CyTrue); - if(status != CY_U3P_SUCCESS) + if (status != CY_U3P_SUCCESS) goto handle_fatal_error; /* This function calls starts the RTOS kernel. @@ -3117,9 +3285,10 @@ int main(void) { * compiler happy. */ return 0; - /* If an error occurs before the launch of the kernel, it is unrecoverable. - * Once you go down this hole, you aren't coming back out without a power - * reset. */ - handle_fatal_error: - while(1); +/* If an error occurs before the launch of the kernel, it is unrecoverable. + * Once you go down this hole, you aren't coming back out without a power + * reset. */ +handle_fatal_error: + while (1) + ; } diff --git a/firmware/fx3/b200/firmware/makefile b/firmware/fx3/b200/firmware/makefile index c4135829b..a7b741ce9 100644 --- a/firmware/fx3/b200/firmware/makefile +++ b/firmware/fx3/b200/firmware/makefile @@ -18,7 +18,7 @@ endif MODULE = b200_main -SOURCE += $(MODULE).c b200_i2c.c b200_usb_descriptors.c ../common/common_helpers.c ../common/common_descriptors.c cyfxtx.c +SOURCE += $(MODULE).c b200_i2c.c b200_usb_descriptors.c syscalls.c ../common/common_helpers.c ../common/common_descriptors.c cyfxtx.c INCFLAGS = -I../common diff --git a/firmware/fx3/b200/firmware/syscalls.c b/firmware/fx3/b200/firmware/syscalls.c new file mode 100644 index 000000000..75ddbca76 --- /dev/null +++ b/firmware/fx3/b200/firmware/syscalls.c @@ -0,0 +1,68 @@ +#include +#include +#include + +int _close(int file) +{ + (void)file; + errno = ENOSYS; + return -1; +} + +int _fstat(int file, struct stat* st) +{ + (void)file; + if (st != 0) { + st->st_mode = S_IFCHR; + } + return 0; +} + +int _getpid(void) +{ + return 1; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _read(int file, char* ptr, int len) +{ + (void)file; + (void)ptr; + (void)len; + return 0; +} + +void _exit(int status) +{ + (void)status; + while (1) { + } +} + +int _write(int file, const char* ptr, int len) +{ + (void)file; + (void)ptr; + return len; +} \ No newline at end of file diff --git a/firmware/fx3/b200/fx3_mem_map.patch b/firmware/fx3/b200/fx3_mem_map.patch index 5c1ca9849..362e6e296 100644 --- a/firmware/fx3/b200/fx3_mem_map.patch +++ b/firmware/fx3/b200/fx3_mem_map.patch @@ -1,10 +1,10 @@ diff -r -u cyfx3sdk/fw_build/boot_fw/cyfx3.ld cyfx3sdk-modified/fw_build/boot_fw/cyfx3.ld ---- cyfx3sdk/fw_build/boot_fw/cyfx3.ld 2018-05-23 02:25:01.000000000 -0700 -+++ cyfx3sdk-modified/fw_build/boot_fw/cyfx3.ld 2020-08-22 14:54:46.407481500 -0700 -@@ -39,12 +39,18 @@ - +--- cyfx3sdk/fw_build/boot_fw/cyfx3.ld 2026-08-11 15:34:04.645797167 +0200 ++++ cyfx3sdk-modified/fw_build/boot_fw/cyfx3.ld 2026-08-11 15:51:14.427111162 +0200 +@@ -41,12 +41,18 @@ MEMORY { + I-TCM : ORIGIN = 0x100 LENGTH = 0x100 + BLANK : ORIGIN = 0x40070000 LENGTH = 0x0100 SYS_MEM : ORIGIN = 0x40078000 LENGTH = 0x7000 DATA : ORIGIN = 0x4007F000 LENGTH = 0x1000 @@ -17,12 +17,12 @@ diff -r -u cyfx3sdk/fw_build/boot_fw/cyfx3.ld cyfx3sdk-modified/fw_build/boot_fw + . += 0x100; + } > BLANK + - .text : + .vectors : { - *(RESET) + *(CYU3P_ITCM_SECTION) diff -r -u cyfx3sdk/fw_build/fx3_fw/cyfxtx.c cyfx3sdk-modified/fw_build/fx3_fw/cyfxtx.c ---- cyfx3sdk/fw_build/fx3_fw/cyfxtx.c 2018-05-23 02:25:01.000000000 -0700 -+++ cyfx3sdk-modified/fw_build/fx3_fw/cyfxtx.c 2020-08-21 12:34:14.344699800 -0700 +--- cyfx3sdk/fw_build/fx3_fw/cyfxtx.c 2026-08-11 15:34:04.685797262 +0200 ++++ cyfx3sdk-modified/fw_build/fx3_fw/cyfxtx.c 2026-08-11 15:34:17.397827996 +0200 @@ -98,7 +98,7 @@ area which is used by the application code as well as the drivers to allocate thread stacks and other internal data structures. @@ -33,8 +33,8 @@ diff -r -u cyfx3sdk/fw_build/fx3_fw/cyfxtx.c cyfx3sdk-modified/fw_build/fx3_fw/c /* diff -r -u cyfx3sdk/fw_build/fx3_fw/fx3_512k.ld cyfx3sdk-modified/fw_build/fx3_fw/fx3_512k.ld ---- cyfx3sdk/fw_build/fx3_fw/fx3_512k.ld 2018-05-23 02:25:01.000000000 -0700 -+++ cyfx3sdk-modified/fw_build/fx3_fw/fx3_512k.ld 2020-08-21 12:34:14.345050200 -0700 +--- cyfx3sdk/fw_build/fx3_fw/fx3_512k.ld 2026-08-11 15:34:04.665797215 +0200 ++++ cyfx3sdk-modified/fw_build/fx3_fw/fx3_512k.ld 2026-08-11 15:34:17.381827956 +0200 @@ -32,11 +32,11 @@ The default memory map used for FX3 applications is as follows: @@ -52,10 +52,10 @@ diff -r -u cyfx3sdk/fw_build/fx3_fw/fx3_512k.ld cyfx3sdk-modified/fw_build/fx3_f Interrupt handlers are placed in I-TCM (16KB). The first 256 bytes of ITCM are reserved for Exception Vectors and will be loaded during firmware initialization. -@@ -58,8 +58,8 @@ +@@ -59,8 +59,8 @@ MEMORY { - I-TCM : ORIGIN = 0x100 LENGTH = 0x3F00 + I-TCM : ORIGIN = 0x200 LENGTH = 0x3E00 - SYS_MEM : ORIGIN = 0x40003000 LENGTH = 0x2D000 - DATA : ORIGIN = 0x40030000 LENGTH = 0x8000 + SYS_MEM : ORIGIN = 0x40003000 LENGTH = 0x35000 @@ -63,7 +63,7 @@ diff -r -u cyfx3sdk/fw_build/fx3_fw/fx3_512k.ld cyfx3sdk-modified/fw_build/fx3_f } SECTIONS -@@ -114,5 +114,17 @@ +@@ -115,5 +115,17 @@ . = ALIGN(4); } > DATA __exidx_end = .;